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Message-ID: <CAL_Jsq+TvPMZLeBx5Xi4pUNKueGUG9pSTXO2DzWov401w4a6Qw@mail.gmail.com>
Date: Wed, 30 Mar 2022 17:14:49 -0500
From: Rob Herring <robh@...nel.org>
To: Kohei Tarumizu <tarumizu.kohei@...itsu.com>
Cc: Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
Dave Hansen <dave.hansen@...ux.intel.com>,
X86 ML <x86@...nel.org>, "H. Peter Anvin" <hpa@...or.com>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 5/8] arm64: Create cache sysfs directory without ACPI
PPTT for hardware prefetch control
On Fri, Mar 11, 2022 at 4:23 AM Kohei Tarumizu
<tarumizu.kohei@...itsu.com> wrote:
>
> This patch create a cache sysfs directory without ACPI PPTT if the
> CONFIG_HWPF_CONTROL is true.
>
> Hardware prefetch control driver need cache sysfs directory and cache
> level/type information. In ARM processor, these information can be
> obtained from the register even without PPTT.
What registers? CCSIDR register is no longer used. You must use DT or PPTT.
> Therefore, we set the
> cpu_map_populated to true to create cache sysfs directory if the
> machine doesn't have PPTT.
>
> Signed-off-by: Kohei Tarumizu <tarumizu.kohei@...itsu.com>
> ---
> arch/arm64/kernel/cacheinfo.c | 29 +++++++++++++++++++++++++++++
> 1 file changed, 29 insertions(+)
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