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Message-ID: <319e976acb0a686e596b88520dbcda59c78afe9e.camel@pengutronix.de>
Date: Thu, 31 Mar 2022 11:28:05 +0200
From: Lucas Stach <l.stach@...gutronix.de>
To: Adam Ford <aford173@...il.com>,
linux-arm-kernel@...ts.infradead.org
Cc: tharvey@...eworks.com, aford@...conembedded.com,
Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Peng Fan <peng.fan@....com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] soc: imx: gpcv2: keep i.MX8MM VPU-H1 bus clock active
Hi Adam, hi Shawn,
Am Samstag, dem 20.11.2021 um 13:39 -0600 schrieb Adam Ford:
> Enable the vpu-h1 clock when the domain is active because reading
> or writing to the VPU-H1 IP block cause the system to hang.
>
> Fixes: 656ade7aa42a ("soc: imx: gpcv2: keep i.MX8M* bus clocks enabled")
> Signed-off-by: Adam Ford <aford173@...il.com>
>
> diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
> index b8d52d8d29db..7b6dfa33dcb9 100644
> --- a/drivers/soc/imx/gpcv2.c
> +++ b/drivers/soc/imx/gpcv2.c
> @@ -734,6 +734,7 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
> .map = IMX8MM_VPUH1_A53_DOMAIN,
> },
> .pgc = BIT(IMX8MM_PGC_VPUH1),
> + .keep_clocks = true,
> },
>
I missed this patch and just stumbled across it when looking at the git
history. I don't think this patch is correct. The H1 GPC domain does
not even have clocks assigned in the DT, so there is nothing to keep
active. Also H1 is not a MIX domain, so it should not keep any bus
clocks active, that is the job of the VPUMIX domain.
While this patch is a no-op, as far as I can see, it still seems wrong
and I think it should be reverted.
Regards,
Lucas
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