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Message-ID: <a3d68966dbabc800adabef96b9a7e5d325d5b5f7.camel@intel.com>
Date:   Tue, 05 Apr 2022 12:23:44 +1200
From:   Kai Huang <kai.huang@...el.com>
To:     Dave Hansen <dave.hansen@...el.com>,
        "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
        bp@...en8.de
Cc:     aarcange@...hat.com, ak@...ux.intel.com, brijesh.singh@....com,
        dan.j.williams@...el.com, dave.hansen@...ux.intel.com,
        david@...hat.com, hpa@...or.com, jgross@...e.com,
        jmattson@...gle.com, joro@...tes.org, jpoimboe@...hat.com,
        knsathya@...nel.org, linux-kernel@...r.kernel.org, luto@...nel.org,
        mingo@...hat.com, pbonzini@...hat.com, peterz@...radead.org,
        sathyanarayanan.kuppuswamy@...ux.intel.com, sdeep@...are.com,
        seanjc@...gle.com, tglx@...utronix.de, thomas.lendacky@....com,
        tony.luck@...el.com, vkuznets@...hat.com, wanpengli@...cent.com,
        x86@...nel.org
Subject: Re: [PATCHv7.1 02/30] x86/tdx: Provide common base for SEAMCALL and
 TDCALL C wrappers

On Mon, 2022-04-04 at 17:01 -0700, Dave Hansen wrote:
> On 4/4/22 16:35, Kai Huang wrote:
> > Both error code formats defined by P-SEAMLDR and TDX module has some reserved
> > bits which will never be set to 1.  I think we can just add a simple comment
> > explaining that and choose a value which has 1 set for those reserved bits (even
> > doesn't have to be -1). For example:
> > 
> > 	/*
> > 	 * Use -1ULL which will never conflict with any actual error code
> > 	 * returned by both the P-SEAMLDR and the TDX module to represent
> > 	 * VMfailInvalid.  Both error code definitions defined by the
> > 	 * P-SEAMLDR and the TDX module have some reserved bits which will
> > 	 * never be set to 1.
> > 	 */
> > 	#define TDX_SEAMCALL_VMFAILINVALID	GENMASK_ULL(63, 0)
> 
> The vague "some reserved bits" magic works for exactly *one* error code.
>  If you ever want to make it two, then you subject some some poor future
> dope to a trip to TDX documentation purgatory.
> 
> All I'm asking is that this code stand on its own.  Just declare what
> the *ACTUAL* reserved bits are.  Not some vague reference to "some
> bits".  There are *REAL* documented bits.  Use them, please.

OK.  How about below:

	/*
	 * VMfailInvalid happens before any actual internal logic of the
	 * P-SEAMLDR and the TDX module is reached.  Use a unique value which
	 * will never conflict with any actual error code returned by both the
	 * P-SEAMLDR and the TDX module to represent this case.
	 *
	 * Both error code definitions of the P-SEAMLDR and the TDX module have
	 * some reserved bits (bits 61:48 for the TDX module and bits 62:32 for
	 * the P-SEAMLDR) which will never be set to 1.  Choose -1ULL as it
will
	 * never be returned as error code by both of them.
	 */
	#define TDX_SEAMCALL_VMFAILINVALID	GENMASK_ULL(63, 0)

-- 
Thanks,
-Kai

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