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Message-ID: <5263978a-19ef-fff3-cc61-b272a833171f@intel.com>
Date: Mon, 4 Apr 2022 17:01:27 -0700
From: Dave Hansen <dave.hansen@...el.com>
To: Kai Huang <kai.huang@...el.com>,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
bp@...en8.de
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Subject: Re: [PATCHv7.1 02/30] x86/tdx: Provide common base for SEAMCALL and
TDCALL C wrappers
On 4/4/22 16:35, Kai Huang wrote:
> Both error code formats defined by P-SEAMLDR and TDX module has some reserved
> bits which will never be set to 1. I think we can just add a simple comment
> explaining that and choose a value which has 1 set for those reserved bits (even
> doesn't have to be -1). For example:
>
> /*
> * Use -1ULL which will never conflict with any actual error code
> * returned by both the P-SEAMLDR and the TDX module to represent
> * VMfailInvalid. Both error code definitions defined by the
> * P-SEAMLDR and the TDX module have some reserved bits which will
> * never be set to 1.
> */
> #define TDX_SEAMCALL_VMFAILINVALID GENMASK_ULL(63, 0)
The vague "some reserved bits" magic works for exactly *one* error code.
If you ever want to make it two, then you subject some some poor future
dope to a trip to TDX documentation purgatory.
All I'm asking is that this code stand on its own. Just declare what
the *ACTUAL* reserved bits are. Not some vague reference to "some
bits". There are *REAL* documented bits. Use them, please.
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