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Message-ID: <MN2PR12MB3949923BCD8B368F8269565BFAE49@MN2PR12MB3949.namprd12.prod.outlook.com>
Date: Tue, 5 Apr 2022 20:26:53 +0000
From: "Carroll, Lewis" <Lewis.Carroll@....com>
To: Borislav Petkov <bp@...en8.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"peterz@...radead.org" <peterz@...radead.org>,
"dave.hansen@...ux.intel.com" <dave.hansen@...ux.intel.com>
CC: "Karny, Wyes" <Wyes.Karny@....com>,
"Limonciello, Mario" <Mario.Limonciello@....com>,
"Shenoy, Gautham Ranjal" <gautham.shenoy@....com>,
"Narayan, Ananth" <Ananth.Narayan@....com>,
"Rao, Bharata Bhasker" <bharata@....com>,
"len.brown@...el.com" <len.brown@...el.com>,
"x86@...nel.org" <x86@...nel.org>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"mingo@...hat.com" <mingo@...hat.com>,
"hpa@...or.com" <hpa@...or.com>,
"chang.seok.bae@...el.com" <chang.seok.bae@...el.com>,
"keescook@...omium.org" <keescook@...omium.org>,
"metze@...ba.org" <metze@...ba.org>,
"zhengqi.arch@...edance.com" <zhengqi.arch@...edance.com>,
"mark.rutland@....com" <mark.rutland@....com>
Subject: RE: [PATCH] x86: Prefer MWAIT over HALT on AMD processors
[AMD Official Use Only]
Merging some comments from subsequent threads below...
> -----Original Message-----
> From: Borislav Petkov <bp@...en8.de>
> Sent: Tuesday, April 5, 2022 10:06 AM
> To: Karny, Wyes <Wyes.Karny@....com>
> Cc: linux-kernel@...r.kernel.org; Carroll, Lewis <Lewis.Carroll@....com>;
> Limonciello, Mario <Mario.Limonciello@....com>; Shenoy, Gautham Ranjal
> <gautham.shenoy@....com>; Narayan, Ananth <Ananth.Narayan@....com>; Rao,
> Bharata Bhasker <bharata@....com>; len.brown@...el.com; x86@...nel.org;
> tglx@...utronix.de; mingo@...hat.com; dave.hansen@...ux.intel.com;
> hpa@...or.com; peterz@...radead.org; chang.seok.bae@...el.com;
> keescook@...omium.org; metze@...ba.org; zhengqi.arch@...edance.com;
> mark.rutland@....com
> Subject: Re: [PATCH] x86: Prefer MWAIT over HALT on AMD processors
>
> [CAUTION: External Email]
>
> On Tue, Apr 05, 2022 at 06:30:21PM +0530, Wyes Karny wrote:
> > From: Lewis Caroll <lewis.carroll@....com>
> >
> > Currently in the absence of the cpuidle driver (eg: when global
> > C-States are disabled in the BIOS or when cpuidle is driver is not
> > compiled in),
>
> When does that ever happen?
>
> Sounds like a very very niche situation to me...
>
This happens when:
* User disables global C-states in BIOS
* User disables cpuidle (e.g. idle=off or processor.max_cstate=0)
* Kernel does not have CONFIG_ACPI_PROCESSOR_IDLE
Genesis of this patch is customer performance observations.
> > Here we enable MWAIT instruction as the default idle call for AMD Zen
> > processors which support MWAIT. We retain the existing behaviour for
> > older processors which depend on HALT.
>
> Please use passive voice in your commit message: no "we" or "I", etc, and
> describe your changes in imperative mood.
>
> Also, pls read section "2) Describe your changes" in
> Documentation/process/submitting-patches.rst for more details.
>
> Also, see section "Changelog" in
> Documentation/process/maintainer-tip.rst
>
> Bottom line is: personal pronouns are ambiguous in text, especially with so
> many parties/companies/etc developing the kernel so let's avoid them please.
>
> > static int prefer_mwait_c1_over_halt(const struct cpuinfo_x86 *c) {
> > - if (c->x86_vendor != X86_VENDOR_INTEL)
> > + if (!early_mwait_supported(c))
>
> Isn't it enough to simply do here:
>
> if (cpu_has(c, X86_FEATURE_ZEN))
> return 1;
>
> if (c->x86_vendor != X86_VENDOR_INTEL)
> return 0;
>
> ...
Yes. We felt the code more readable with the prefer_mwait_c1_over_halt fn.
Hygon CPU init indeed sets X86_FEATURE ZEN.
AMD CPU init sets X86_FEATURE_ZEN for family >= 17h (not only 17h).
Cleanest solution might be a new CPU feature (e.g. X86_PREFER_MWAIT_IDLE) that
gets set appropriately, but that would require touching more files.
>
>
> --
> Regards/Gruss,
> Boris.
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