linux-kernel - Re: [PATCH v2] pinctrl: Ingenic: Add missing UART2 group C for X1000/E

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Message-ID: <b04e92b4-e7c5-c3b2-54b1-c684012d81d2@wanyeetech.com>
Date:   Fri, 8 Apr 2022 03:07:12 +0800
From:   Zhou Yanjie <zhouyu@...yeetech.com>
To:     Yunian Yang <reimu@...omaker.com>, linux-mips@...r.kernel.org
Cc:     Paul Cercueil <paul@...pouillou.net>,
        Linus Walleij <linus.walleij@...aro.org>,
        linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] pinctrl: Ingenic: Add missing UART2 group C for
 X1000/E


On 2022/3/24 下午9:33, Yunian Yang wrote:
> v2: Define PC31 pin only once, noted by Paul Cercueil <paul@...pouillou.net>
>      Confirmed to work on hardware. Although the Ingenic folks did this twice
>      in their 4.4 kernel fork; not sure why.
>
> X1000/E has a third UART2 pin group selection, which uses the TDI(G2) as RX
> and TDO(G1) as TX. This configuration is becoming increasingly popular in
> newer core boards, such as the Halley2 v4.1. This is done by enabling
> function 1 of a "virtual pin" PC31. See section 19.3.3 of the X1000
> Programming Manual for details.
>
> Signed-off-by: Yunian Yang <reimu@...omaker.com>


A similar situation exists on JZ4780, except that its virtual pin is PA31.



Tested-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@...yeetech.com>


Thanks and best regards!


> ---
>   drivers/pinctrl/pinctrl-ingenic.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c
> index 2712f51eb238..29709059d62b 100644
> --- a/drivers/pinctrl/pinctrl-ingenic.c
> +++ b/drivers/pinctrl/pinctrl-ingenic.c
> @@ -1982,6 +1982,7 @@ static int x1000_uart1_data_a_pins[] = { 0x04, 0x05, };
>   static int x1000_uart1_data_d_pins[] = { 0x62, 0x63, };
>   static int x1000_uart1_hwflow_pins[] = { 0x64, 0x65, };
>   static int x1000_uart2_data_a_pins[] = { 0x02, 0x03, };
> +static int x1000_uart2_data_c_pins[] = { 0x5f, };
>   static int x1000_uart2_data_d_pins[] = { 0x65, 0x64, };
>   static int x1000_sfc_data_pins[] = { 0x1d, 0x1c, 0x1e, 0x1f, };
>   static int x1000_sfc_clk_pins[] = { 0x1a, };
> @@ -2058,6 +2059,7 @@ static const struct group_desc x1000_groups[] = {
>          INGENIC_PIN_GROUP("uart1-data-d", x1000_uart1_data_d, 1),
>          INGENIC_PIN_GROUP("uart1-hwflow", x1000_uart1_hwflow, 1),
>          INGENIC_PIN_GROUP("uart2-data-a", x1000_uart2_data_a, 2),
> +       INGENIC_PIN_GROUP("uart2-data-c", x1000_uart2_data_c, 1),
>          INGENIC_PIN_GROUP("uart2-data-d", x1000_uart2_data_d, 0),
>          INGENIC_PIN_GROUP("sfc-data", x1000_sfc_data, 1),
>          INGENIC_PIN_GROUP("sfc-clk", x1000_sfc_clk, 1),
> @@ -2115,7 +2117,7 @@ static const char *x1000_uart0_groups[] = { "uart0-data", "uart0-hwflow", };
>   static const char *x1000_uart1_groups[] = {
>          "uart1-data-a", "uart1-data-d", "uart1-hwflow",
>   };
> -static const char *x1000_uart2_groups[] = { "uart2-data-a", "uart2-data-d", };
> +static const char *x1000_uart2_groups[] = { "uart2-data-a", "uart2-data-c", "uart2-data-d", };
>   static const char *x1000_sfc_groups[] = { "sfc-data", "sfc-clk", "sfc-ce", };
>   static const char *x1000_ssi_groups[] = {
>          "ssi-dt-a-22", "ssi-dt-a-29", "ssi-dt-d",