linux-kernel - Re: [PATCH v2 6/8] mtd: spi-nor: core: Add helpers to read/write any register

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Message-ID: <c4dacc1b-d7c5-91d4-8162-2ef4db03f285@microchip.com>
Date:   Mon, 11 Apr 2022 07:29:00 +0000
From:   <Tudor.Ambarus@...rochip.com>
To:     <michael@...le.cc>
CC:     <p.yadav@...com>, <miquel.raynal@...tlin.com>, <richard@....at>,
        <vigneshr@...com>, <linux-mtd@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <Nicolas.Ferre@...rochip.com>,
        <Takahiro.Kuwano@...ineon.com>
Subject: Re: [PATCH v2 6/8] mtd: spi-nor: core: Add helpers to read/write any
 register

On 3/22/22 01:13, Michael Walle wrote:
> Am 2022-02-28 12:17, schrieb Tudor Ambarus:
>> There are manufacturers that use registers indexed by address. Some of
>> them support "read/write any register" opcodes. Provide core methods that
>> can be used by all manufacturers. SPI NOR controller ops are intentionally
>> not supported as we intend to move all the SPI NOR controller drivers
>> under the SPI subsystem.
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@...rochip.com>
>> Tested-by: Takahiro Kuwano <Takahiro.Kuwano@...ineon.com>
>> Reviewed-by: Pratyush Yadav <p.yadav@...com>
>> ---
>>  drivers/mtd/spi-nor/core.c | 41 ++++++++++++++++++++++++++++++++++++++
>>  drivers/mtd/spi-nor/core.h |  4 ++++
>>  2 files changed, 45 insertions(+)
>>
>> diff --git a/drivers/mtd/spi-nor/core.c b/drivers/mtd/spi-nor/core.c
>> index 281e3d25f74c..f1aa1e2ea7c9 100644
>> --- a/drivers/mtd/spi-nor/core.c
>> +++ b/drivers/mtd/spi-nor/core.c
>> @@ -307,6 +307,47 @@ ssize_t spi_nor_write_data(struct spi_nor *nor,
>> loff_t to, size_t len,
>>      return nor->controller_ops->write(nor, to, len, buf);
>>  }
>>
>> +/**
>> + * spi_nor_read_reg() - read register to flash memory
>> + * @nor:        pointer to 'struct spi_nor'.
>> + * @op:        SPI memory operation. op->data.buf must be DMA-able.
>> + * @proto:    SPI protocol to use for the register operation.
>> + *
>> + * Return: zero on success, -errno otherwise
>> + */
>> +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op,
>> +             enum spi_nor_protocol proto)
>> +{
>> +    if (!nor->spimem)
>> +        return -EOPNOTSUPP;
>> +
>> +    spi_nor_spimem_setup_op(nor, op, proto);
>> +    return spi_nor_spimem_exec_op(nor, op);
>> +}
>> +
>> +/**
>> + * spi_nor_write_reg() - write register to flash memory
>> + * @nor:        pointer to 'struct spi_nor'
>> + * @op:        SPI memory operation. op->data.buf must be DMA-able.
>> + * @proto:    SPI protocol to use for the register operation.
>> + *
>> + * Return: zero on success, -errno otherwise
>> + */
>> +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op,
>> +              enum spi_nor_protocol proto)
>> +{
>> +    int ret;
>> +
>> +    if (!nor->spimem)
>> +        return -EOPNOTSUPP;
>> +
>> +    ret = spi_nor_write_enable(nor);
>> +    if (ret)
>> +        return ret;
>> +    spi_nor_spimem_setup_op(nor, op, proto);
>> +    return spi_nor_spimem_exec_op(nor, op);
>> +}
>> +
>>  /**
>>   * spi_nor_write_enable() - Set write enable latch with Write Enable command.
>>   * @nor:    pointer to 'struct spi_nor'.
>> diff --git a/drivers/mtd/spi-nor/core.h b/drivers/mtd/spi-nor/core.h
>> index f952061d5c24..7c704475946d 100644
>> --- a/drivers/mtd/spi-nor/core.h
>> +++ b/drivers/mtd/spi-nor/core.h
>> @@ -554,6 +554,10 @@ ssize_t spi_nor_read_data(struct spi_nor *nor,
>> loff_t from, size_t len,
>>                u8 *buf);
>>  ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
>>                 const u8 *buf);
>> +int spi_nor_read_reg(struct spi_nor *nor, struct spi_mem_op *op,
>> +             enum spi_nor_protocol proto);
>> +int spi_nor_write_reg(struct spi_nor *nor, struct spi_mem_op *op,
>> +              enum spi_nor_protocol proto);
> 
> These look rather odd. I'd expect to see an address and such for
> such a "random register read/write". Looks like these functions

There are at least 6 function parameters if we want to explicitly pass function
arguments: pointer to nor, opcode, addr.nbytes, addr, buf.nbytes, buf. Not to
mention ndummy for reads. A bit too much for me, so I preferred passing spi_mem_op
directly.

> don't do much except calling spi_nor_spimem_setup_op() and
> exec_op() and don't have anything to do with register access
> (except maybe for the write enable). Can't we have a bit more
> sophisticated interface in the core? Something that calls into
> the flash driver to assemble the spi_mem_op automatically? Assuming

Looks liks some ping-pong, passing spi_mem_op directly is straight forward
and can address all manufacturer varieties.

So I prefer keeping these generic methods, it will reduce code duplication.

Thanks,
ta