linux-kernel - [PATCH V4 1/2] dt-bindings: mmc: sdhci-msm: Add gcc resets strings

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Date:   Tue, 12 Apr 2022 16:02:07 +0530
From:   Shaik Sajida Bhanu <quic_c_sbhanu@...cinc.com>
To:     ulf.hansson@...aro.org, robh+dt@...nel.org, krzk+dt@...nel.org,
        linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, agross@...nel.org,
        bjorn.andersson@...aro.org, linux-arm-msm@...r.kernel.org
Cc:     quic_rampraka@...cinc.com, quic_pragalla@...cinc.com,
        quic_sartgarg@...cinc.com, quic_nitirawa@...cinc.com,
        quic_sayalil@...cinc.com,
        Shaik Sajida Bhanu <quic_c_sbhanu@...cinc.com>
Subject: [PATCH V4 1/2] dt-bindings: mmc: sdhci-msm: Add gcc resets strings

Add gcc hardware reset supported strings for qcom-sdhci controller.

Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@...cinc.com>
---
 Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
index 6216ed7..9f02461 100644
--- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
+++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt
@@ -76,6 +76,7 @@ Optional Properties:
 		"cpu-sdhc".
 		Please refer to Documentation/devicetree/bindings/
 		interconnect/ for more details.
+- resets: Phandle and reset specifier for the device's reset.
 
 Example:
 
@@ -98,6 +99,8 @@ Example:
 				<&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
 		interconnect-names = "sdhc-ddr","cpu-sdhc";
 
+		resets = <&gcc GCC_SDCC1_BCR>;
+
 		qcom,dll-config = <0x000f642c>;
 		qcom,ddr-config = <0x80040868>;
 	};
@@ -118,6 +121,8 @@ Example:
 		clocks = <&gcc GCC_SDCC2_APPS_CLK>, <&gcc GCC_SDCC2_AHB_CLK>;
 		clock-names = "core", "iface";
 
+		resets = <&gcc GCC_SDCC2_BCR>;
+
 		qcom,dll-config = <0x0007642c>;
 		qcom,ddr-config = <0x80040868>;
 	};
-- 
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