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Message-ID: <d248d95b-0b9a-cf33-9fd5-47e74870bc0f@oracle.com>
Date: Thu, 14 Apr 2022 00:56:53 +0000
From: Jane Chu <jane.chu@...cle.com>
To: Dan Williams <dan.j.williams@...el.com>
CC: david <david@...morbit.com>, "Darrick J. Wong" <djwong@...nel.org>,
Christoph Hellwig <hch@...radead.org>,
Vishal L Verma <vishal.l.verma@...el.com>,
Dave Jiang <dave.jiang@...el.com>,
Alasdair Kergon <agk@...hat.com>,
Mike Snitzer <snitzer@...hat.com>,
device-mapper development <dm-devel@...hat.com>,
"Weiny, Ira" <ira.weiny@...el.com>,
Matthew Wilcox <willy@...radead.org>,
Vivek Goyal <vgoyal@...hat.com>,
linux-fsdevel <linux-fsdevel@...r.kernel.org>,
Linux NVDIMM <nvdimm@...ts.linux.dev>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-xfs <linux-xfs@...r.kernel.org>, X86 ML <x86@...nel.org>,
Dave Hansen <dave.hansen@...el.com>,
Peter Zijlstra <peterz@...radead.org>,
Andy Lutomirski <luto@...nel.org>
Subject: Re: [PATCH v7 2/6] x86/mce: relocate set{clear}_mce_nospec()
functions
On 4/11/2022 3:20 PM, Dan Williams wrote:
> I notice that none of the folks from "X86 MM" are on the cc, added.
>
Noted, thanks!
> On Tue, Apr 5, 2022 at 12:49 PM Jane Chu <jane.chu@...cle.com> wrote:
>>
>> Relocate the twin mce functions to arch/x86/mm/pat/set_memory.c
>> file where they belong.
>>
>> Signed-off-by: Jane Chu <jane.chu@...cle.com>
>> ---
>> arch/x86/include/asm/set_memory.h | 52 -------------------------------
>> arch/x86/mm/pat/set_memory.c | 47 ++++++++++++++++++++++++++++
>> include/linux/set_memory.h | 9 +++---
>> 3 files changed, 52 insertions(+), 56 deletions(-)
>>
>> diff --git a/arch/x86/include/asm/set_memory.h b/arch/x86/include/asm/set_memory.h
>> index 78ca53512486..b45c4d27fd46 100644
>> --- a/arch/x86/include/asm/set_memory.h
>> +++ b/arch/x86/include/asm/set_memory.h
>> @@ -86,56 +86,4 @@ bool kernel_page_present(struct page *page);
>>
>> extern int kernel_set_to_readonly;
>>
>> -#ifdef CONFIG_X86_64
>> -/*
>> - * Prevent speculative access to the page by either unmapping
>> - * it (if we do not require access to any part of the page) or
>> - * marking it uncacheable (if we want to try to retrieve data
>> - * from non-poisoned lines in the page).
>> - */
>> -static inline int set_mce_nospec(unsigned long pfn, bool unmap)
>> -{
>> - unsigned long decoy_addr;
>> - int rc;
>> -
>> - /* SGX pages are not in the 1:1 map */
>> - if (arch_is_platform_page(pfn << PAGE_SHIFT))
>> - return 0;
>> - /*
>> - * We would like to just call:
>> - * set_memory_XX((unsigned long)pfn_to_kaddr(pfn), 1);
>> - * but doing that would radically increase the odds of a
>> - * speculative access to the poison page because we'd have
>> - * the virtual address of the kernel 1:1 mapping sitting
>> - * around in registers.
>> - * Instead we get tricky. We create a non-canonical address
>> - * that looks just like the one we want, but has bit 63 flipped.
>> - * This relies on set_memory_XX() properly sanitizing any __pa()
>> - * results with __PHYSICAL_MASK or PTE_PFN_MASK.
>> - */
>> - decoy_addr = (pfn << PAGE_SHIFT) + (PAGE_OFFSET ^ BIT(63));
>> -
>> - if (unmap)
>> - rc = set_memory_np(decoy_addr, 1);
>> - else
>> - rc = set_memory_uc(decoy_addr, 1);
>> - if (rc)
>> - pr_warn("Could not invalidate pfn=0x%lx from 1:1 map\n", pfn);
>> - return rc;
>> -}
>> -#define set_mce_nospec set_mce_nospec
>> -
>> -/* Restore full speculative operation to the pfn. */
>> -static inline int clear_mce_nospec(unsigned long pfn)
>> -{
>> - return set_memory_wb((unsigned long) pfn_to_kaddr(pfn), 1);
>> -}
>> -#define clear_mce_nospec clear_mce_nospec
>> -#else
>> -/*
>> - * Few people would run a 32-bit kernel on a machine that supports
>> - * recoverable errors because they have too much memory to boot 32-bit.
>> - */
>> -#endif
>> -
>> #endif /* _ASM_X86_SET_MEMORY_H */
>> diff --git a/arch/x86/mm/pat/set_memory.c b/arch/x86/mm/pat/set_memory.c
>> index 38af155aaba9..93dde949f224 100644
>> --- a/arch/x86/mm/pat/set_memory.c
>> +++ b/arch/x86/mm/pat/set_memory.c
>> @@ -1925,6 +1925,53 @@ int set_memory_wb(unsigned long addr, int numpages)
>> }
>> EXPORT_SYMBOL(set_memory_wb);
>>
>> +#ifdef CONFIG_X86_64
>
> It seems like the only X86_64 dependency in this routine is the
> address bit 63 usage, so how about:
>
> if (!IS_ENABLED(CONFIG_64BIT))
> return 0;
>
> ...and drop the ifdef?
Sure.
>
> Other than that you can add:
>
> Reviewed-by: Dan Williams <dan.j.williams@...el.com>
Thanks!
-jane
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