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Message-ID: <Ylkvgo8Lcpmi09x1@gondor.apana.org.au>
Date: Fri, 15 Apr 2022 16:40:34 +0800
From: Herbert Xu <herbert@...dor.apana.org.au>
To: conor.dooley@...rochip.com
Cc: linux-kernel@...r.kernel.org, linux-crypto@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH v2 1/1] hwrng: mpfs - add polarfire soc hwrng support
On Fri, Apr 08, 2022 at 10:09:12AM +0000, conor.dooley@...rochip.com wrote:
> From: Conor Dooley <conor.dooley@...rochip.com>
>
> Add a driver to access the hardware random number generator on the
> Polarfire SoC. The hwrng can only be accessed via the system controller,
> so use the mailbox interface the system controller exposes to access the
> hwrng.
>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
> ---
> drivers/char/hw_random/Kconfig | 13 ++++
> drivers/char/hw_random/Makefile | 1 +
> drivers/char/hw_random/mpfs-rng.c | 104 ++++++++++++++++++++++++++++++
> 3 files changed, 118 insertions(+)
> create mode 100644 drivers/char/hw_random/mpfs-rng.c
Patch applied. Thanks.
--
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
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