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Message-ID: <02b3fe1c-12f9-8f96-a9b5-df44ca001825@linaro.org>
Date: Mon, 18 Apr 2022 17:54:32 +0200
From: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
To: Frank Wunderlich <linux@...web.de>,
linux-rockchip@...ts.infradead.org
Cc: Frank Wunderlich <frank-w@...lic-files.de>,
Kishon Vijay Abraham I <kishon@...com>,
Vinod Koul <vkoul@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Heiko Stuebner <heiko@...ech.de>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Krzysztof WilczyĆski <kw@...ux.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Philipp Zabel <p.zabel@...gutronix.de>,
Johan Jonker <jbx6244@...il.com>,
Peter Geis <pgwipeout@...il.com>,
Michael Riesch <michael.riesch@...fvision.net>,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-pci@...r.kernel.org
Subject: Re: [RFC/RFT 2/6] dt-bindings: soc: grf: add pcie30-{phy,pipe}-grf
On 16/04/2022 15:54, Frank Wunderlich wrote:
> From: Frank Wunderlich <frank-w@...lic-files.de>
>
> Add compatibles for PCIe v3 General Register Files.
>
> Signed-off-by: Frank Wunderlich <frank-w@...lic-files.de>
> ---
> Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
> index 3be3cfd52f7b..ae48b58bd062 100644
> --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
> @@ -14,6 +14,8 @@ properties:
> oneOf:
> - items:
> - enum:
> + - rockchip,pcie30-phy-grf
> + - rockchip,pcie30-pipe-grf
These are without SoC parts. Are these PCIe v3 General Register Files
part of some PCIe spec?
> - rockchip,rk3288-sgrf
> - rockchip,rk3566-pipe-grf
> - rockchip,rk3568-usb2phy-grf
Best regards,
Krzysztof
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