linux-kernel - Re: [PATCH V2 0/3] riscv: atomic: Optimize AMO instructions usage

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Message-ID: <20220418234137.GA444607@anparri>
Date:   Tue, 19 Apr 2022 01:41:37 +0200
From:   Andrea Parri <parri.andrea@...il.com>
To:     Guo Ren <guoren@...nel.org>
Cc:     Boqun Feng <boqun.feng@...il.com>,
        Daniel Lustig <dlustig@...dia.com>,
        "Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
        Arnd Bergmann <arnd@...db.de>,
        Palmer Dabbelt <palmer@...belt.com>,
        Mark Rutland <mark.rutland@....com>,
        Will Deacon <will@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        linux-arch <linux-arch@...r.kernel.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Guo Ren <guoren@...ux.alibaba.com>
Subject: Re: [PATCH V2 0/3] riscv: atomic: Optimize AMO instructions usage

> > Seems to me that you are basically reverting 5ce6c1f3535f
> > ("riscv/atomic: Strengthen implementations with fences"). That commit
> > fixed an memory ordering issue, could you explain why the issue no
> > longer needs a fix?
> 
> I'm not reverting the prior patch, just optimizing it.
> 
> In RISC-V “A” Standard Extension for Atomic Instructions spec, it said:

With reference to the RISC-V herd specification at:

  https://github.com/riscv/riscv-isa-manual.git

the issue, better, lr-sc-aqrl-pair-vs-full-barrier seems to _no longer_
need a fix since commit:

  03a5e722fc0f ("Updates to the memory consistency model spec")

(here a template, to double check:

  https://github.com/litmus-tests/litmus-tests-riscv/blob/master/tests/non-mixed-size/HAND/LR-SC-NOT-FENCE.litmus )

I defer to Daniel/others for a "bi-section" of the prose specification.
;-)

  Andrea