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Message-ID: <20220419033237.23405-2-rex-bc.chen@mediatek.com>
Date: Tue, 19 Apr 2022 11:32:33 +0800
From: Rex-BC Chen <rex-bc.chen@...iatek.com>
To: <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
<chunkuang.hu@...nel.org>, <p.zabel@...gutronix.de>
CC: <airlied@...ux.ie>, <matthias.bgg@...il.com>,
<angelogioacchino.delregno@...labora.com>,
<jason-jh.lin@...iatek.com>, <nancy.lin@...iatek.com>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<dri-devel@...ts.freedesktop.org>,
<linux-mediatek@...ts.infradead.org>,
<linux-arm-kernel@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: [PATCH 1/5] dt-bindings: arm: mediatek: mmsys: add power and gce properties
From: "jason-jh.lin" <jason-jh.lin@...iatek.com>
Power:
1. Add description for power-domains property.
GCE:
1. Add description for mboxes property.
2. Add description for mediatek,gce-client-reg property.
Signed-off-by: jason-jh.lin <jason-jh.lin@...iatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Reviewed-by: CK Hu <ck.hu@...iatek.com>
---
.../bindings/arm/mediatek/mediatek,mmsys.yaml | 31 +++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
index b31d90dc9eb4..6c2c3edcd443 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
@@ -41,6 +41,30 @@ properties:
reg:
maxItems: 1
+ power-domains:
+ description:
+ A phandle and PM domain specifier as defined by bindings
+ of the power controller specified by phandle. See
+ Documentation/devicetree/bindings/power/power-domain.yaml for details.
+
+ mboxes:
+ description:
+ Using mailbox to communicate with GCE, it should have this
+ property and list of phandle, mailbox specifiers. See
+ Documentation/devicetree/bindings/mailbox/mtk-gce.txt for details.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+
+ mediatek,gce-client-reg:
+ description:
+ The register of client driver can be configured by gce with 4 arguments
+ defined in this property, such as phandle of gce, subsys id,
+ register offset and size.
+ Each subsys id is mapping to a base address of display function blocks
+ register which is defined in the gce header
+ include/dt-bindings/gce/<chip>-gce.h.
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ maxItems: 1
+
"#clock-cells":
const: 1
@@ -56,9 +80,16 @@ additionalProperties: false
examples:
- |
+ #include <dt-bindings/power/mt8173-power.h>
+ #include <dt-bindings/gce/mt8173-gce.h>
+
mmsys: syscon@...00000 {
compatible = "mediatek,mt8173-mmsys", "syscon";
reg = <0x14000000 0x1000>;
+ power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
#clock-cells = <1>;
#reset-cells = <1>;
+ mboxes = <&gce 0 CMDQ_THR_PRIO_HIGHEST>,
+ <&gce 1 CMDQ_THR_PRIO_HIGHEST>;
+ mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0 0x1000>;
};
--
2.18.0
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