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Message-ID: <d934c6a2-ecc3-48cb-a65f-99f7789af7bc@arm.com>
Date: Tue, 19 Apr 2022 14:55:42 +0100
From: James Clark <james.clark@....com>
To: Anshuman Khandual <anshuman.khandual@....com>,
linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
peterz@...radead.org, acme@...nel.org
Cc: Robin Murphy <robin.murphy@....com>,
Suzuki Poulose <suzuki.poulose@....com>,
Ingo Molnar <mingo@...hat.com>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...hat.com>,
Namhyung Kim <namhyung@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
Will Deacon <will@...nel.org>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH V5 1/8] perf: Add system error and not in transaction
branch types
On 04/04/2022 05:50, Anshuman Khandual wrote:
> This expands generic branch type classification by adding two more entries
> there in i.e system error and not in transaction. This also updates the x86
> implementation to process X86_BR_NO_TX records as appropriate. This changes
> branch types reported to user space on x86 platform but it should not be a
> problem. The possible scenarios and impacts are enumerated here.
>
> --------------------------------------------------------------------------
> | kernel | perf tool | Impact |
> --------------------------------------------------------------------------
> | old | old | Works as before |
> --------------------------------------------------------------------------
> | old | new | PERF_BR_UNKNOWN is processed |
> --------------------------------------------------------------------------
> | new | old | PERF_BR_NO_TX are blocked via old PERF_BR_MAX |
> --------------------------------------------------------------------------
> | new | new | NO_TX are recognized |
> --------------------------------------------------------------------------
>
> When PERF_BR_NO_TX is blocked via old PERF_BR_MAX (new kernel with old perf
> tool) the user space might throw up an warning complaining about an
> unrecognized branch types being reported, but it's expected. PERF_BR_SERROR
> & PERF_BR_NO_TX branch types will be used for BRBE implementation on arm64
> platform.
>
> PERF_BR_NO_TX complements 'abort' and 'in_tx' elements in perf_branch_entry
> which represent other transaction states for a given branch record. Because
> this completes the transaction state classification.
>
> Cc: Peter Zijlstra <peterz@...radead.org>
> Cc: Ingo Molnar <mingo@...hat.com>
> Cc: Arnaldo Carvalho de Melo <acme@...nel.org>
> Cc: Mark Rutland <mark.rutland@....com>
> Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
> Cc: Jiri Olsa <jolsa@...hat.com>
> Cc: Namhyung Kim <namhyung@...nel.org>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Will Deacon <will@...nel.org>
> Cc: linux-arm-kernel@...ts.infradead.org
> Cc: linux-perf-users@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
Reviewed-by: James Clark <james.clark@....com>
> ---
> arch/x86/events/intel/lbr.c | 2 +-
> include/uapi/linux/perf_event.h | 2 ++
> 2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
> index fe1742c4ca49..30dcd18936d5 100644
> --- a/arch/x86/events/intel/lbr.c
> +++ b/arch/x86/events/intel/lbr.c
> @@ -1336,7 +1336,7 @@ static int branch_map[X86_BR_TYPE_MAP_MAX] = {
> PERF_BR_IND_CALL, /* X86_BR_IND_CALL */
> PERF_BR_UNKNOWN, /* X86_BR_ABORT */
> PERF_BR_UNKNOWN, /* X86_BR_IN_TX */
> - PERF_BR_UNKNOWN, /* X86_BR_NO_TX */
> + PERF_BR_NO_TX, /* X86_BR_NO_TX */
> PERF_BR_CALL, /* X86_BR_ZERO_CALL */
> PERF_BR_UNKNOWN, /* X86_BR_CALL_STACK */
> PERF_BR_IND, /* X86_BR_IND_JMP */
> diff --git a/include/uapi/linux/perf_event.h b/include/uapi/linux/perf_event.h
> index d37629dbad72..26d8f0b5ac0d 100644
> --- a/include/uapi/linux/perf_event.h
> +++ b/include/uapi/linux/perf_event.h
> @@ -253,6 +253,8 @@ enum {
> PERF_BR_COND_RET = 10, /* conditional function return */
> PERF_BR_ERET = 11, /* exception return */
> PERF_BR_IRQ = 12, /* irq */
> + PERF_BR_SERROR = 13, /* system error */
> + PERF_BR_NO_TX = 14, /* not in transaction */
> PERF_BR_MAX,
> };
>
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