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Message-ID: <7926128f-c547-495e-5ae2-d069f31cc3a1@quicinc.com>
Date:   Wed, 20 Apr 2022 22:37:48 +0800
From:   Jinlong Mao <quic_jinlmao@...cinc.com>
To:     Mike Leach <mike.leach@...aro.org>
CC:     Mathieu Poirier <mathieu.poirier@...aro.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Leo Yan <leo.yan@...aro.org>,
        "Greg Kroah-Hartman" <gregkh@...uxfoundation.org>,
        <coresight@...ts.linaro.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        Tingwei Zhang <quic_tingweiz@...cinc.com>,
        Yuanfang Zhang <quic_yuanfang@...cinc.com>,
        Tao Zhang <quic_taozha@...cinc.com>,
        Trilok Soni <quic_tsoni@...cinc.com>,
        Hao Zhang <quic_hazha@...cinc.com>,
        <linux-arm-msm@...r.kernel.org>
Subject: Re: [PATCH v5 08/10] dt-bindings: arm: Adds CoreSight TPDA hardware
 definitions


On 4/19/2022 4:32 PM, Mike Leach wrote:
> Hi
>
> On Tue, 12 Apr 2022 at 13:51, Mao Jinlong <quic_jinlmao@...cinc.com> wrote:
>> Adds new coresight-tpda.yaml file describing the bindings required
>> to define tpda in the device trees.
>>
>> Signed-off-by: Tao Zhang <quic_taozha@...cinc.com>
>> Signed-off-by: Mao Jinlong <quic_jinlmao@...cinc.com>
>> ---
>>   .../bindings/arm/coresight-tpda.yaml          | 119 ++++++++++++++++++
>>   1 file changed, 119 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/arm/coresight-tpda.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/arm/coresight-tpda.yaml b/Documentation/devicetree/bindings/arm/coresight-tpda.yaml
>> new file mode 100644
>> index 000000000000..2c79de0a7928
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/arm/coresight-tpda.yaml
>> @@ -0,0 +1,119 @@
>> +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
>> +# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/arm/coresight-tpda.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Trace, Profiling and Diagnostics Aggregator - TPDA
>> +
>> +description: |
>> +  TPDAs are responsible for packetization and timestamping of data sets
>> +  utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or
>> +  more attached TPDM and pushing the resultant (packetized) data out a
>> +  master ATB interface. Performing an arbitrated ATB interleaving (funneling)
>> +  task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).
>> +
>> +maintainers:
>> +  - Suzuki K Poulose <suzuki.poulose@....com>
>> +  - Mathieu Poirier <mathieu.poirier@...aro.org>
>> +
> as mentioned in patch 03 - these should be bindings maintainers.
>
> with the above change
>
> Reviewed by: Mike Leach <mike.leach@...aro.org>
>
>
Thank you Mike. I will address the comments in next version.
>
>> +properties:
>> +  $nodename:
>> +    pattern: "^tpda(@[0-9a-f]+)$"
>> +  compatible:
>> +    items:
>> +      - const: qcom,coresight-tpda
>> +      - const: arm,primecell
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    maxItems: 1
>> +
>> +  clock-names:
>> +    items:
>> +      - const: apb_pclk
>> +
>> +  in-ports:
>> +    type: object
>> +    description: |
>> +      Input connections from TPDM to TPDA
>> +    $ref: /schemas/graph.yaml#/properties/ports
>> +
>> +    properties:
>> +      '#address-cells':
>> +        const: 1
>> +
>> +      '#size-cells':
>> +        const: 0
>> +
>> +    patternProperties:
>> +      "^port@[0-9a-f]+$":
>> +        type: object
>> +        required:
>> +          - reg
>> +
>> +    required:
>> +      - '#size-cells'
>> +      - '#address-cells'
>> +
>> +  out-ports:
>> +    type: object
>> +    description: |
>> +      Output connections from the TPDA to legacy CoreSight trace bus.
>> +    $ref: /schemas/graph.yaml#/properties/ports
>> +
>> +    properties:
>> +     port:
>> +       description:
>> +         Output connection from the TPDA to legacy CoreSight Trace bus.
>> +       $ref: /schemas/graph.yaml#/properties/port
>> +
>> +required:
>> +    - compatible
>> +    - reg
>> +    - clocks
>> +    - clock-names
>> +    - in-ports
>> +    - out-ports
>> +
>> +additionalProperties: false
>> +
>> +examples:
>> +  # minimum tpda definition.
>> +  - |
>> +    tpda@...4000 {
>> +       compatible = "qcom,coresight-tpda", "arm,primecell";
>> +       reg = <0x6004000 0x1000>;
>> +
>> +       qcom,tpda-atid = <65>;
>> +
>> +       clocks = <&aoss_qmp>;
>> +       clock-names = "apb_pclk";
>> +
>> +       in-ports {
>> +         #address-cells = <1>;
>> +         #size-cells = <0>;
>> +
>> +        port@0 {
>> +          reg = <0>;
>> +          tpda_qdss_0_in_tpdm_dcc: endpoint {
>> +            remote-endpoint =
>> +              <&tpdm_dcc_out_tpda_qdss_0>;
>> +            };
>> +        };
>> +      };
>> +
>> +       out-ports {
>> +         port {
>> +                 tpda_qdss_out_funnel_in0: endpoint {
>> +                    remote-endpoint =
>> +                    <&funnel_in0_in_tpda_qdss>;
>> +                  };
>> +          };
>> +       };
>> +    };
>> +
>> +...
>> --
>> 2.17.1
>>
>
> --
> Mike Leach
> Principal Engineer, ARM Ltd.
> Manchester Design Centre. UK

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