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Date:   Thu, 21 Apr 2022 15:36:29 -0500
From:   Bjorn Helgaas <helgaas@...nel.org>
To:     Kai-Heng Feng <kai.heng.feng@...onical.com>
Cc:     Vidya Sagar <vidyas@...dia.com>,
        "Kenneth R. Crudup" <kenny@...ix.com>, bhelgaas@...gle.com,
        lorenzo.pieralisi@....com, hkallweit1@...il.com,
        wangxiongfeng2@...wei.com, mika.westerberg@...ux.intel.com,
        chris.packham@...iedtelesis.co.nz, yangyicong@...ilicon.com,
        treding@...dia.com, jonathanh@...dia.com, abhsahu@...dia.com,
        sagupta@...dia.com, linux-pci@...r.kernel.org,
        linux-kernel@...r.kernel.org, kthota@...dia.com,
        mmaddireddy@...dia.com, sagar.tv@...il.com,
        Ricky Wu <ricky_wu@...ltek.com>,
        Rajat Jain <rajatja@...gle.com>,
        Prasad Malisetty <quic_pmaliset@...cinc.com>,
        Victor Ding <victording@...gle.com>
Subject: Re: [PATCH V1] PCI/ASPM: Save/restore L1SS Capability for
 suspend/resume

On Thu, Apr 21, 2022 at 02:16:29PM +0800, Kai-Heng Feng wrote:
> On Sat, Apr 16, 2022 at 5:25 AM Bjorn Helgaas <helgaas@...nel.org> wrote:
> > On Fri, Apr 15, 2022 at 10:26:19PM +0800, Kai-Heng Feng wrote:
> > ...

> > > So I forced the pcie_aspm_pm_state_change() calling path to eventually
> > > call aspm_calc_l1ss_info() which solved the problem for me.
> >
> > This would update T_PwrOn and LTR1.2_Threshold, so I guess it makes
> > sense that this would help.  But I think we need to figure out the
> > reason why pcie_aspm_pm_state_change() exists and get rid of it or at
> > least better integrate it with pci_restore_state().
> >
> > If we call pcie_aspm_pm_state_change() after D3cold or reset, things
> > still aren't going to work because the LTR cap isn't restored or
> > programmed.
> 
> More than that, the ASPM sysfs won't be restored correctly after
> resume [1] because of it.
> So I'd like to post a patch to drop pcie_aspm_pm_state_change() if
> there's no objection.

Please do :)  Obviously somebody thought we needed
pcie_aspm_pm_state_change() for some reason or it wouldn't have been
added.  But I didn't figure out since it was included in the very
first ASPM support: 6c723d5bd89f ("PCI: PCIE ASPM support").

Maybe the comment that "devices changed PM state, we should recheck if
latency meets all functions' requirement" is a clue but I haven't
followed up.

> [1] https://lore.kernel.org/linux-pci/20211021035159.1117456-2-kai.heng.feng@canonical.com/
> 
> Kai-Heng

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