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Date:   Thu, 21 Apr 2022 17:11:26 +0800
From:   Roger Lu <roger.lu@...iatek.com>
To:     Kevin Hilman <khilman@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Enric Balletbo Serra <eballetbo@...il.com>,
        "Rob Herring" <robh+dt@...nel.org>,
        Nicolas Boichat <drinkcat@...gle.com>,
        "Stephen Boyd" <sboyd@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>
CC:     Fan Chen <fan.chen@...iatek.com>,
        HenryC Chen <HenryC.Chen@...iatek.com>,
        Xiaoqing Liu <Xiaoqing.Liu@...iatek.com>,
        Charles Yang <Charles.Yang@...iatek.com>,
        Angus Lin <Angus.Lin@...iatek.com>,
        Mark Rutland <mark.rutland@....com>,
        Nishanth Menon <nm@...com>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <linux-pm@...r.kernel.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        Guenter Roeck <linux@...ck-us.net>,
        Jia-wei Chang <jia-wei.chang@...iatek.com>
Subject: Re: [PATCH v24 3/7] soc: mediatek: SVS: introduce MTK SVS engine

Hi Kevin,

Thanks very much for the feedback.

On Wed, 2022-04-20 at 17:06 -0700, Kevin Hilman wrote:
> Hi Roger,
> 
> 
> Roger Lu <roger.lu@...iatek.com> writes:
> 
> > The Smart Voltage Scaling(SVS) engine is a piece of hardware
> > which calculates suitable SVS bank voltages to OPP voltage table.
> > Then, DVFS driver could apply those SVS bank voltages to PMIC/Buck
> > when receiving OPP_EVENT_ADJUST_VOLTAGE.
> > 
> > Signed-off-by: Roger Lu <roger.lu@...iatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@...labora.com>
> 
> Can SVS work with one or the other clusters disabled?  It seems like it
> should still be able to work.  However, if you disable the 2nd cluster
> (e.g. by passing `maxcpus=4` on the kernel command-line, the SVS driver
> will fail to probe.
> 
> I dont' think it's a blocker for merging this series, but making the
> probe a bit more robust so it can handle the cluster being disabled
> would be nice additional fix for later.
> 
> For example, upstream kernel on mt8183-pumpkin board is very unstable
> with the 2nd cluster enabled (I'm still trying to debug why), but I have
> to boot with `maxcpus=4` on the cmdline, otherwise kernel fails to boot,
> so that's how I noticed this probe failure with SVS.

On mt8183 platform, I think SVS can work with one or the other clusters
disabled. However, SVS is supposed to be enabled after system is stable for not
involving any power unstable concern.

If we want part of SVS works at the development stage, we can disable non-
working svs bank as below. Thanks.

--- a/drivers/soc/mediatek/mtk-svs.c
+++ b/drivers/soc/mediatek/mtk-svs.c
@@ -2164,7 +2164,7 @@ static struct svs_bank svs_mt8183_banks[] = {
                .cpu_id                 = 4,
                .buck_name              = "proc",
                .volt_flags             = SVSB_INIT01_VOLT_INC_ONLY,
-               .mode_support           = SVSB_MODE_INIT01 | SVSB_MODE_INIT02,
+               .mode_support           = SVSB_MODE_ALL_DISABLE,
                .opp_count              = MAX_OPP_ENTRIES,

> 
> Kevin

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