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Date:   Thu, 21 Apr 2022 17:28:35 +0800
From:   Roger Lu <roger.lu@...iatek.com>
To:     Kevin Hilman <khilman@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Enric Balletbo Serra <eballetbo@...il.com>,
        "Rob Herring" <robh+dt@...nel.org>,
        Nicolas Boichat <drinkcat@...gle.com>,
        "Stephen Boyd" <sboyd@...nel.org>,
        Philipp Zabel <p.zabel@...gutronix.de>
CC:     Fan Chen <fan.chen@...iatek.com>,
        HenryC Chen <HenryC.Chen@...iatek.com>,
        Xiaoqing Liu <Xiaoqing.Liu@...iatek.com>,
        Charles Yang <Charles.Yang@...iatek.com>,
        Angus Lin <Angus.Lin@...iatek.com>,
        Mark Rutland <mark.rutland@....com>,
        Nishanth Menon <nm@...com>, <devicetree@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-mediatek@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <linux-pm@...r.kernel.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        Guenter Roeck <linux@...ck-us.net>,
        Jia-wei Chang <jia-wei.chang@...iatek.com>
Subject: Re: [PATCH v24 0/7] soc: mediatek: SVS: introduce MTK SVS

Hi Kevin,

On Wed, 2022-04-20 at 16:22 -0700, Kevin Hilman wrote:
> Hi Roger,
> 
> 
> Roger Lu <roger.lu@...iatek.com> writes:
> 
> > The Smart Voltage Scaling(SVS) engine is a piece of hardware
> > which calculates suitable SVS bank voltages to OPP voltage table.
> > Then, DVFS driver could apply those SVS bank voltages to PMIC/Buck
> > when receiving OPP_EVENT_ADJUST_VOLTAGE.
> > 
> > 1. SVS driver uses OPP adjust event in [1] to update OPP table voltage part.
> > 2. SVS driver gets thermal/GPU device by node [2][3] and CPU device by
> > get_cpu_device().
> > After retrieving subsys device, SVS driver calls device_link_add() to make
> > sure probe/suspend callback priority.
> > 
> > [1] 
> > https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm.git/commit/?h=opp*linux-next&id=25cb20a212a1f989385dfe23230817e69c62bee5__;Lw!!CTRNKA9wMg0ARbw!3gWsdVuiyF0iafrmVINP9FVz7fjGB1UqTPLfMNWEhsl96RDPB-Se6Q-g3F8daK-u$
> >  
> > [2] 
> > https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm.git/commit/?h=opp*linux-next&id=b325ce39785b1408040d90365a6ab1aa36e94f87__;Lw!!CTRNKA9wMg0ARbw!3gWsdVuiyF0iafrmVINP9FVz7fjGB1UqTPLfMNWEhsl96RDPB-Se6Q-g3Lel3h4j$
> >  
> > [3] 
> > https://urldefense.com/v3/__https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux.git/commit/?h=v5.16-next*dts64&id=a8168cebf1bca1b5269e8a7eb2626fb76814d6e2__;Lw!!CTRNKA9wMg0ARbw!3gWsdVuiyF0iafrmVINP9FVz7fjGB1UqTPLfMNWEhsl96RDPB-Se6Q-g3KhMdm00$
> >  
> > 
> > Change since v23:
> > - Change wording from "Mediatek" to "MediaTek" (uppercase T) in mtk-
> > svs.yaml.
> > - Use cpuidle_pause_and_lock() to prevent system from entering cpuidle
> > instead of applying pm_qos APIs.
> > - Add kfree() at the end of svs_probe() when encountering probe fail.
> > - Change MODULE_LICENSE from "GPL v2" to "GPL".
> > - Add nvmem_cell_put() in error handling when nvmem_cell_read() encounters
> > fail.
> 
> I also gave you a reviewed-by on v23, but here it is again:
> 
> Reviewed-by: Kevin Hilman <khilman@...libre.com>
> 
> 
> That being said, it would be really nice to see an integration tree
> where this was all tested on mainline (e.g. v5.17, or v5.18-rc)
> 
> For example, I can apply this to v5.18-rc2 and boot on my mt8183-pumpkin
> board, it fails to probe[1] because there is no CCI node in the upstream
> mt8183.dtsi.
> 
> I'm assuming this series is also not very useful without the CPUfreq
> series from Rex, so being able to test this, CCI and CPUfreq together on
> MT8183 on a mainline kernel would be very helpful.
> 
> Kevin
> 
> [1]
> [    0.573332] mtk-svs 1100b000.svs: cannot find cci node
> [    0.574061] mtk-svs 1100b000.svs: error -ENODEV: svs platform probe fail

Just share. I've tested this series on below two platforms and it works as
expected.
- mt8183-Krane (kernel-v5.10)
- mt8192-Hayato (kernel-v5.4)

Sincerely,
Roger Lu.

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