lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [day] [month] [year] [list] 
Message-ID: <bc7b6ebe-27fa-5832-d3f2-888f744d6ac2@gmail.com>
Date:   Fri, 22 Apr 2022 14:32:17 +0200
From:   Matthias Brugger <matthias.bgg@...il.com>
To:     "jason-jh.lin" <jason-jh.lin@...iatek.com>,
        Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
Cc:     CK Hu <ck.hu@...iatek.com>, Nancy Lin <nancy.lin@...iatek.com>,
        Singo Chang <singo.chang@...iatek.com>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        dri-devel@...ts.freedesktop.org,
        linux-mediatek@...ts.infradead.org,
        linux-arm-kernel@...ts.infradead.org,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v20 6/8] soc: mediatek: add DDP_DOMPONENT_DITHER0 enum for
 mt8195 vdosys0



On 19/04/2022 11:41, jason-jh.lin wrote:
> The mmsys routing table of mt8195 vdosys0 has 2 DITHER components,
> so mmsys need to add DDP_COMPONENT_DITHER1 and change all usages of
> DITHER enum form DDP_COMPONENT_DITHER to DDP_COMPONENT_DITHER0.
> 
> But its header need to keep DDP_COMPONENT_DITHER enum
> until drm/mediatek also changed it.
> 
> Signed-off-by: jason-jh.lin <jason-jh.lin@...iatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>

Applied, thanks!

> ---
>   drivers/soc/mediatek/mt8167-mmsys.h    |  2 +-
>   drivers/soc/mediatek/mt8183-mmsys.h    |  2 +-
>   drivers/soc/mediatek/mt8186-mmsys.h    |  4 ++--
>   drivers/soc/mediatek/mt8192-mmsys.h    |  4 ++--
>   drivers/soc/mediatek/mt8195-mmsys.h    |  8 ++++----
>   drivers/soc/mediatek/mt8365-mmsys.h    |  4 ++--
>   drivers/soc/mediatek/mtk-mutex.c       | 10 +++++-----
>   include/linux/soc/mediatek/mtk-mmsys.h |  1 +
>   8 files changed, 18 insertions(+), 17 deletions(-)
> 
> diff --git a/drivers/soc/mediatek/mt8167-mmsys.h b/drivers/soc/mediatek/mt8167-mmsys.h
> index 2772ef5e3934..f7a35b3656bb 100644
> --- a/drivers/soc/mediatek/mt8167-mmsys.h
> +++ b/drivers/soc/mediatek/mt8167-mmsys.h
> @@ -18,7 +18,7 @@ static const struct mtk_mmsys_routes mt8167_mmsys_routing_table[] = {
>   		DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,
>   		MT8167_DISP_REG_CONFIG_DISP_OVL0_MOUT_EN, OVL0_MOUT_EN_COLOR0,
>   	}, {
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_RDMA0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_RDMA0,
>   		MT8167_DISP_REG_CONFIG_DISP_DITHER_MOUT_EN, MT8167_DITHER_MOUT_EN_RDMA0
>   	}, {
>   		DDP_COMPONENT_OVL0, DDP_COMPONENT_COLOR0,
> diff --git a/drivers/soc/mediatek/mt8183-mmsys.h b/drivers/soc/mediatek/mt8183-mmsys.h
> index 0c021f4b76d2..ff6be1703469 100644
> --- a/drivers/soc/mediatek/mt8183-mmsys.h
> +++ b/drivers/soc/mediatek/mt8183-mmsys.h
> @@ -41,7 +41,7 @@ static const struct mtk_mmsys_routes mmsys_mt8183_routing_table[] = {
>   		MT8183_DISP_OVL1_2L_MOUT_EN, MT8183_OVL1_2L_MOUT_EN_RDMA1,
>   		MT8183_OVL1_2L_MOUT_EN_RDMA1
>   	}, {
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
>   		MT8183_DISP_DITHER0_MOUT_EN, MT8183_DITHER0_MOUT_IN_DSI0,
>   		MT8183_DITHER0_MOUT_IN_DSI0
>   	}, {
> diff --git a/drivers/soc/mediatek/mt8186-mmsys.h b/drivers/soc/mediatek/mt8186-mmsys.h
> index c72ccf86ea28..eb1ad9c37a9c 100644
> --- a/drivers/soc/mediatek/mt8186-mmsys.h
> +++ b/drivers/soc/mediatek/mt8186-mmsys.h
> @@ -76,12 +76,12 @@ static const struct mtk_mmsys_routes mmsys_mt8186_routing_table[] = {
>   		MT8186_RDMA0_SOUT_TO_COLOR0
>   	},
>   	{
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
>   		MT8186_DISP_DITHER0_MOUT_EN, MT8186_DITHER0_MOUT_EN_MASK,
>   		MT8186_DITHER0_MOUT_TO_DSI0,
>   	},
>   	{
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
>   		MT8186_DISP_DSI0_SEL_IN, MT8186_DSI0_SEL_IN_MASK,
>   		MT8186_DSI0_FROM_DITHER0
>   	},
> diff --git a/drivers/soc/mediatek/mt8192-mmsys.h b/drivers/soc/mediatek/mt8192-mmsys.h
> index 6aae0b12b6ff..a016d80b4bc1 100644
> --- a/drivers/soc/mediatek/mt8192-mmsys.h
> +++ b/drivers/soc/mediatek/mt8192-mmsys.h
> @@ -40,7 +40,7 @@ static const struct mtk_mmsys_routes mmsys_mt8192_routing_table[] = {
>   		MT8192_DISP_OVL2_2L_MOUT_EN, MT8192_OVL2_2L_MOUT_EN_RDMA4,
>   		MT8192_OVL2_2L_MOUT_EN_RDMA4
>   	}, {
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
>   		MT8192_DISP_DITHER0_MOUT_EN, MT8192_DITHER0_MOUT_IN_DSI0,
>   		MT8192_DITHER0_MOUT_IN_DSI0
>   	}, {
> @@ -52,7 +52,7 @@ static const struct mtk_mmsys_routes mmsys_mt8192_routing_table[] = {
>   		MT8192_DISP_AAL0_SEL_IN, MT8192_AAL0_SEL_IN_CCORR0,
>   		MT8192_AAL0_SEL_IN_CCORR0
>   	}, {
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
>   		MT8192_DISP_DSI0_SEL_IN, MT8192_DSI0_SEL_IN_DITHER0,
>   		MT8192_DSI0_SEL_IN_DITHER0
>   	}, {
> diff --git a/drivers/soc/mediatek/mt8195-mmsys.h b/drivers/soc/mediatek/mt8195-mmsys.h
> index 13ab0ab64396..abfe94a30248 100644
> --- a/drivers/soc/mediatek/mt8195-mmsys.h
> +++ b/drivers/soc/mediatek/mt8195-mmsys.h
> @@ -113,7 +113,7 @@ static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = {
>   		MT8195_VDO0_SEL_IN, MT8195_SEL_IN_VPP_MERGE_FROM_MASK,
>   		MT8195_SEL_IN_VPP_MERGE_FROM_VDO1_VIRTUAL0
>   	}, {
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSC0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSC0,
>   		MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSC_WRAP0_IN_FROM_MASK,
>   		MT8195_SEL_IN_DSC_WRAP0_IN_FROM_DISP_DITHER0
>   	}, {
> @@ -181,7 +181,7 @@ static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = {
>   		MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSI0_FROM_MASK,
>   		MT8195_SEL_IN_DSI0_FROM_DSC_WRAP0_OUT
>   	}, {
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
>   		MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DSI0_FROM_MASK,
>   		MT8195_SEL_IN_DSI0_FROM_DISP_DITHER0
>   	}, {
> @@ -245,11 +245,11 @@ static const struct mtk_mmsys_routes mmsys_mt8195_routing_table[] = {
>   		MT8195_VDO0_SEL_IN, MT8195_SEL_IN_DISP_WDMA0_FROM_MASK,
>   		MT8195_SEL_IN_DISP_WDMA0_FROM_DISP_OVL0
>   	}, {
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSC0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSC0,
>   		MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER0_TO_MASK,
>   		MT8195_SOUT_DISP_DITHER0_TO_DSC_WRAP0_IN
>   	}, {
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
>   		MT8195_VDO0_SEL_OUT, MT8195_SOUT_DISP_DITHER0_TO_MASK,
>   		MT8195_SOUT_DISP_DITHER0_TO_DSI0
>   	}, {
> diff --git a/drivers/soc/mediatek/mt8365-mmsys.h b/drivers/soc/mediatek/mt8365-mmsys.h
> index 690e3fe2dee0..24129a6c25f8 100644
> --- a/drivers/soc/mediatek/mt8365-mmsys.h
> +++ b/drivers/soc/mediatek/mt8365-mmsys.h
> @@ -41,12 +41,12 @@ static const struct mtk_mmsys_routes mt8365_mmsys_routing_table[] = {
>   		MT8365_DISP_COLOR_SEL_IN_COLOR0,MT8365_DISP_COLOR_SEL_IN_COLOR0
>   	},
>   	{
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
>   		MT8365_DISP_REG_CONFIG_DISP_DITHER0_MOUT_EN,
>   		MT8365_DITHER_MOUT_EN_DSI0, MT8365_DITHER_MOUT_EN_DSI0
>   	},
>   	{
> -		DDP_COMPONENT_DITHER, DDP_COMPONENT_DSI0,
> +		DDP_COMPONENT_DITHER0, DDP_COMPONENT_DSI0,
>   		MT8365_DISP_REG_CONFIG_DISP_DSI0_SEL_IN,
>   		MT8365_DSI0_SEL_IN_DITHER, MT8365_DSI0_SEL_IN_DITHER
>   	},
> diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c
> index 729ee88035ed..9184684baf1d 100644
> --- a/drivers/soc/mediatek/mtk-mutex.c
> +++ b/drivers/soc/mediatek/mtk-mutex.c
> @@ -232,7 +232,7 @@ static const unsigned int mt8167_mutex_mod[DDP_COMPONENT_ID_MAX] = {
>   	[DDP_COMPONENT_AAL0] = MT8167_MUTEX_MOD_DISP_AAL,
>   	[DDP_COMPONENT_CCORR] = MT8167_MUTEX_MOD_DISP_CCORR,
>   	[DDP_COMPONENT_COLOR0] = MT8167_MUTEX_MOD_DISP_COLOR,
> -	[DDP_COMPONENT_DITHER] = MT8167_MUTEX_MOD_DISP_DITHER,
> +	[DDP_COMPONENT_DITHER0] = MT8167_MUTEX_MOD_DISP_DITHER,
>   	[DDP_COMPONENT_GAMMA] = MT8167_MUTEX_MOD_DISP_GAMMA,
>   	[DDP_COMPONENT_OVL0] = MT8167_MUTEX_MOD_DISP_OVL0,
>   	[DDP_COMPONENT_OVL1] = MT8167_MUTEX_MOD_DISP_OVL1,
> @@ -265,7 +265,7 @@ static const unsigned int mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
>   	[DDP_COMPONENT_AAL0] = MT8183_MUTEX_MOD_DISP_AAL0,
>   	[DDP_COMPONENT_CCORR] = MT8183_MUTEX_MOD_DISP_CCORR0,
>   	[DDP_COMPONENT_COLOR0] = MT8183_MUTEX_MOD_DISP_COLOR0,
> -	[DDP_COMPONENT_DITHER] = MT8183_MUTEX_MOD_DISP_DITHER0,
> +	[DDP_COMPONENT_DITHER0] = MT8183_MUTEX_MOD_DISP_DITHER0,
>   	[DDP_COMPONENT_GAMMA] = MT8183_MUTEX_MOD_DISP_GAMMA0,
>   	[DDP_COMPONENT_OVL0] = MT8183_MUTEX_MOD_DISP_OVL0,
>   	[DDP_COMPONENT_OVL_2L0] = MT8183_MUTEX_MOD_DISP_OVL0_2L,
> @@ -279,7 +279,7 @@ static const unsigned int mt8186_mutex_mod[DDP_COMPONENT_ID_MAX] = {
>   	[DDP_COMPONENT_AAL0] = MT8186_MUTEX_MOD_DISP_AAL0,
>   	[DDP_COMPONENT_CCORR] = MT8186_MUTEX_MOD_DISP_CCORR0,
>   	[DDP_COMPONENT_COLOR0] = MT8186_MUTEX_MOD_DISP_COLOR0,
> -	[DDP_COMPONENT_DITHER] = MT8186_MUTEX_MOD_DISP_DITHER0,
> +	[DDP_COMPONENT_DITHER0] = MT8186_MUTEX_MOD_DISP_DITHER0,
>   	[DDP_COMPONENT_GAMMA] = MT8186_MUTEX_MOD_DISP_GAMMA0,
>   	[DDP_COMPONENT_OVL0] = MT8186_MUTEX_MOD_DISP_OVL0,
>   	[DDP_COMPONENT_OVL_2L0] = MT8186_MUTEX_MOD_DISP_OVL0_2L,
> @@ -292,7 +292,7 @@ static const unsigned int mt8192_mutex_mod[DDP_COMPONENT_ID_MAX] = {
>   	[DDP_COMPONENT_AAL0] = MT8192_MUTEX_MOD_DISP_AAL0,
>   	[DDP_COMPONENT_CCORR] = MT8192_MUTEX_MOD_DISP_CCORR0,
>   	[DDP_COMPONENT_COLOR0] = MT8192_MUTEX_MOD_DISP_COLOR0,
> -	[DDP_COMPONENT_DITHER] = MT8192_MUTEX_MOD_DISP_DITHER0,
> +	[DDP_COMPONENT_DITHER0] = MT8192_MUTEX_MOD_DISP_DITHER0,
>   	[DDP_COMPONENT_GAMMA] = MT8192_MUTEX_MOD_DISP_GAMMA0,
>   	[DDP_COMPONENT_POSTMASK0] = MT8192_MUTEX_MOD_DISP_POSTMASK0,
>   	[DDP_COMPONENT_OVL0] = MT8192_MUTEX_MOD_DISP_OVL0,
> @@ -310,7 +310,7 @@ static const unsigned int mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = {
>   	[DDP_COMPONENT_CCORR] = MT8195_MUTEX_MOD_DISP_CCORR0,
>   	[DDP_COMPONENT_AAL0] = MT8195_MUTEX_MOD_DISP_AAL0,
>   	[DDP_COMPONENT_GAMMA] = MT8195_MUTEX_MOD_DISP_GAMMA0,
> -	[DDP_COMPONENT_DITHER] = MT8195_MUTEX_MOD_DISP_DITHER0,
> +	[DDP_COMPONENT_DITHER0] = MT8195_MUTEX_MOD_DISP_DITHER0,
>   	[DDP_COMPONENT_MERGE0] = MT8195_MUTEX_MOD_DISP_VPP_MERGE,
>   	[DDP_COMPONENT_DSC0] = MT8195_MUTEX_MOD_DISP_DSC_WRAP0_CORE0,
>   	[DDP_COMPONENT_DSI0] = MT8195_MUTEX_MOD_DISP_DSI0,
> diff --git a/include/linux/soc/mediatek/mtk-mmsys.h b/include/linux/soc/mediatek/mtk-mmsys.h
> index cff5c9adbf46..59117d970daf 100644
> --- a/include/linux/soc/mediatek/mtk-mmsys.h
> +++ b/include/linux/soc/mediatek/mtk-mmsys.h
> @@ -17,6 +17,7 @@ enum mtk_ddp_comp_id {
>   	DDP_COMPONENT_COLOR0,
>   	DDP_COMPONENT_COLOR1,
>   	DDP_COMPONENT_DITHER,
> +	DDP_COMPONENT_DITHER0 = DDP_COMPONENT_DITHER,
>   	DDP_COMPONENT_DITHER1,
>   	DDP_COMPONENT_DP_INTF0,
>   	DDP_COMPONENT_DP_INTF1,

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ