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Message-ID: <0b5b586a-3bc7-384e-103c-e40d0b2fac23@sholland.org>
Date: Fri, 22 Apr 2022 18:59:52 -0500
From: Samuel Holland <samuel@...lland.org>
To: Icenowy Zheng <icenowy@...c.io>, Mark Brown <broonie@...nel.org>,
Chen-Yu Tsai <wens@...e.org>,
Jernej Skrabec <jernej.skrabec@...il.com>,
Maxime Ripard <mripard@...nel.org>
Cc: linux-spi@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org, Icenowy Zheng <icenowy@...c.io>
Subject: Re: [PATCH 4/4] spi: sun6i: add support for R329 SPI controllers
On 4/22/22 10:56 AM, icenowy@...look.com wrote:
> From: Icenowy Zheng <icenowy@...c.io>
>
> R329 has two SPI controllers. One of it is quite similar to previous
> ones, but with internal clock divider removed; the other added MIPI DBI
> Type-C offload based on the first one.
>
> Add basical support for these controllers. As we're not going to
> support the DBI functionality now, just implement the two kinds of
> controllers as the same.
I'm curious what speeds you were able to use SPI at. On D1, with effectively
these same changes, I would always get corrupted data when reading from the
onboard SPI NAND on the Nezha board. However, if I enabled the "new mode of
sample timing" (bit 2 in GBL_CTL_REG), I got the correct data.
Regards,
Samuel
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