Message-ID: <20220425131830.29aab83b@fixe.home>
Date:   Mon, 25 Apr 2022 13:18:30 +0200
From:   Clément Léger <clement.leger@...tlin.com>
To:     Philipp Zabel <p.zabel@...gutronix.de>
Cc:     Rob Herring <robh@...nel.org>, Lizhi Hou <lizhi.hou@...inx.com>,
        Sonal Santan <sonal.santan@...inx.com>,
        Frank Rowand <frowand.list@...il.com>,
        Lars Povlsen <lars.povlsen@...rochip.com>,
        Steen Hegelund <Steen.Hegelund@...rochip.com>,
        Microchip Linux Driver Support <UNGLinuxDriver@...rochip.com>,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Allan Nielsen <allan.nielsen@...rochip.com>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        devicetree@...r.kernel.org,
        Stefano Stabellini <sstabellini@...nel.org>,
        Hans de Goede <hdegoede@...hat.com>,
        Mark Brown <broonie@...nel.org>
Subject: Re: [PATCH v2 0/3] add fwnode support to reset subsystem

Le Mon, 25 Apr 2022 12:21:15 +0200,
Philipp Zabel <p.zabel@...gutronix.de> a écrit :

> Hi Clément,
> 
> On Fr, 2022-04-08 at 17:48 +0200, Clément Léger wrote:
> [...]
> > > > > > > I've told the Xilinx folks the same thing, but I would separate this
> > > > > > > into 2 parts. First is just h/w work in a DT based system. Second is
> > > > > > > creating a base tree an overlay can be applied to. The first part should
> > > > > > > be pretty straightforward. We already have PCI bus bindings. The only
> > > > > > > tricky part is getting address translation working from leaf device thru
> > > > > > > the PCI bus to host bus, but support for that should all be in place
> > > > > > > (given we support ISA buses off of PCI bus). The second part will
> > > > > > > require generating PCI DT nodes at runtime. That may be needed for both
> > > > > > > DT and ACPI systems as we don't always describe all the PCI hierarchy
> > > > > > > in DT.      
> > > > > > 
> > > > > > But then, if the driver generate the nodes, it will most probably
> > > > > > have to describe the nodes by hardcoding them right ?      
> > > > > 
> > > > > No, the kernel already maintains its own tree of devices. You just
> > > > > need to use that to generate the tree. That's really not much more
> > > > > than nodes with a 'reg' property encoding the device and function
> > > > > numbers.    
> > > > 
> > > > Just to clarified a point, my PCI device exposes multiple peripherals
> > > > behind one single PCI function.    
> > > 
> > > Right. I would expect your PCI device DT node to have a 'simple-bus' 
> > > child node with all those peripherals. And maybe there's other nodes 
> > > like fixed-clocks, etc.
> > >   
> > > > To be sure I understood what you are suggesting, you propose to create
> > > > a DT node from the PCI driver that has been probed dynamically
> > > > matching this same PCI device with a 'reg' property. I also think
> > > > this would requires to generate some 'pci-ranges' to remap the
> > > > downstream devices that are described in the DTBO, finally, load the
> > > > overlay to be apply under this newly created node. Is that right ?    
> > > 
> > > Right. You'll need to take the BAR address(es) for the device and stick 
> > > those into 'ranges' to translate offsets to BAR+offset.  
> > 
> > Hi Rob,
> > 
> > I got something working (address translation, probing and so on) using
> > what you started. I switch to using changeset however, I'm not sure that
> > it make sense for property creation since the node has not yet been
> > added to the tree. Attaching the node with changeset however seems
> > to make sense. But I'm no expert here, so any advise is welcome.
> >
> > Based on what we said, I created a PCI driver which uses a builtin
> > overlay. In order to be able to apply the overlay on the correct PCI
> > node -the one on which the card was plugged) and thus be totally plug
> > and play, the 'target-path' property is patched using direct fdt
> > function and replaced the target with the PCI device node path.
> > I don't see any other way to do that before applying the overlay since
> > of_overlay_fdt_apply() takes a fdt blob as input.
> > 
> > The driver also insert correct ranges into the PCI device in order to
> > translate the downstream node addresses to BAR addresses. It seems
> > reasonnable to assume that this depends on the driver and thus should
> > not be done by the PCI of core at all.
> > 
> > Finally, the driver probes the newly added childs using
> > of_platform_populate(). With all of that, the address translation
> > and the probing works correctly and the platform devices are created.
> > There is still a few things to fix such as the following:
> > 
> > [ 2830.324773] OF: overlay: WARNING: memory leak will occur if overlay
> > removed, property: /pci/pci@2,6/dev@0,0/compatible
> > 
> > But it seems like this is something that works and would allow to
> > support various use cases. From what I see, it should also work on
> > other platforms. Major advantage of that over fwnode is that the
> > changes are pretty small and relatively contained.  
> 
> Could you show this off somewhere?
> 
> From this I take that fwnode support in the reset subsystem is not of
> use to you anymore. I'll postpone taking your patches then, until they
> are needed.
> 
> regards
> Philipp

Hi Philip,

Sorry for the lack of asnwer. Indeed, the fwnode support can be left
out. I'm preparing the patches for contribution for this OF overlay
thing, and everything regarding the subsystem have been removed. You
can look at commits [1], [2], [3] and at a driver using them [4]. This
allows the subsystem to be kept entirely without a single modification
(except for the PCI/OF one).

Thanks,

Clément


[1]
https://github.com/clementleger/linux/commit/248d7f25951f90cf5647d295e1c5051cc72ed970
[2]
https://github.com/clementleger/linux/commit/bf3c4c0749e5110b6a58ac9622cafc10872ed17f
[3]
https://github.com/clementleger/linux/commit/8764a2e386fdede73991415277b95e79553622f3
[4]
https://github.com/clementleger/linux/commit/7c66a1ad8f3fadfb538c410f192c9573c66338d5




-- 
Clément Léger,
Embedded Linux and Kernel engineer at Bootlin
https://bootlin.com

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