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Message-Id: <20220426070603.56031-1-michal.orzel@arm.com>
Date:   Tue, 26 Apr 2022 09:06:03 +0200
From:   Michal Orzel <michal.orzel@....com>
To:     catalin.marinas@....com, Will Deacon <will@...nel.org>
Cc:     linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        michal.orzel@....com, bertrand.marquis@....com
Subject: [PATCH] arm64: cputype: Avoid overflow using MIDR_IMPLEMENTOR_MASK

Value of macro MIDR_IMPLEMENTOR_MASK exceeds the range of integer
and can lead to overflow. Currently there is no issue as it is used
in expressions implicitly casting it to u32. To avoid possible
problems, fix the macro.

Signed-off-by: Michal Orzel <michal.orzel@....com>
---
Should we also add a U suffix to ARM_CPU_IMP_* macros that are also shifted
by MIDR_IMPLEMENTOR_SHIFT? None of them has bit 7 set but we could take some
precaution steps.
---
 arch/arm64/include/asm/cputype.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h
index ff8f4511df71..92331c07c2d1 100644
--- a/arch/arm64/include/asm/cputype.h
+++ b/arch/arm64/include/asm/cputype.h
@@ -36,7 +36,7 @@
 #define MIDR_VARIANT(midr)	\
 	(((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
 #define MIDR_IMPLEMENTOR_SHIFT	24
-#define MIDR_IMPLEMENTOR_MASK	(0xff << MIDR_IMPLEMENTOR_SHIFT)
+#define MIDR_IMPLEMENTOR_MASK	(0xffU << MIDR_IMPLEMENTOR_SHIFT)
 #define MIDR_IMPLEMENTOR(midr)	\
 	(((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
 
-- 
2.25.1

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