lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <YnJa087yFSv/RAuf@arm.com>
Date:   Wed, 4 May 2022 11:52:03 +0100
From:   Catalin Marinas <catalin.marinas@....com>
To:     Michal Orzel <michal.orzel@....com>
Cc:     Will Deacon <will@...nel.org>,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        bertrand.marquis@....com
Subject: Re: [PATCH] arm64: cputype: Avoid overflow using
 MIDR_IMPLEMENTOR_MASK

On Tue, Apr 26, 2022 at 09:06:03AM +0200, Michal Orzel wrote:
> Value of macro MIDR_IMPLEMENTOR_MASK exceeds the range of integer
> and can lead to overflow. Currently there is no issue as it is used
> in expressions implicitly casting it to u32. To avoid possible
> problems, fix the macro.
> 
> Signed-off-by: Michal Orzel <michal.orzel@....com>
> ---
> Should we also add a U suffix to ARM_CPU_IMP_* macros that are also shifted
> by MIDR_IMPLEMENTOR_SHIFT? None of them has bit 7 set but we could take some
> precaution steps.

I'm ok with not adding it now. We haven't been consistent with this but
we did encounter a few issues in the past with other bits and only fixed
those that were touching bit 31.

-- 
Catalin

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ