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Message-Id: <1651053105-11557-1-git-send-email-quic_spathi@quicinc.com>
Date: Wed, 27 Apr 2022 15:21:45 +0530
From: Srinivasarao Pathipati <quic_spathi@...cinc.com>
To: will@...nel.org, mark.rutland@....com, peterz@...radead.org,
mingo@...hat.com, acme@...nel.org,
alexander.shishkin@...ux.intel.com, jolsa@...nel.org,
namhyung@...nel.org, catalin.marinas@....com,
linux-arm-kernel@...ts.infradead.org,
linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org
Cc: Srinivasarao Pathipati <quic_spathi@...cinc.com>
Subject: [PATCH V1] arm64: perf: Change PMCR write to read-modify-write
Preserve the bitfields of PMCR_EL0 during PMU reset.
Reset routine should set only PMCR.C, PMCR.P and PMCR.LC fields only
to reset the counters. Other fields should not be changed
as they could be set before PMU initialization and their value must
be preserved even after reset.
Signed-off-by: Srinivasarao Pathipati <quic_spathi@...cinc.com>
---
arch/arm64/kernel/perf_event.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
index cb69ff1..9e22326 100644
--- a/arch/arm64/kernel/perf_event.c
+++ b/arch/arm64/kernel/perf_event.c
@@ -1047,7 +1047,7 @@ static void armv8pmu_reset(void *info)
if (armv8pmu_has_long_event(cpu_pmu))
pmcr |= ARMV8_PMU_PMCR_LP;
- armv8pmu_pmcr_write(pmcr);
+ armv8pmu_pmcr_write(armv8pmu_pmcr_read() | pmcr);
}
static int __armv8_pmuv3_map_event(struct perf_event *event,
--
2.7.4
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