linux-kernel - Re: [PATCH V1] arm64: perf: Change PMCR write to read-modify-write

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Message-ID: <99352dbe-c7dd-73da-3e48-807dcaea3e91@arm.com>
Date:   Wed, 27 Apr 2022 11:16:11 +0100
From:   Robin Murphy <robin.murphy@....com>
To:     Srinivasarao Pathipati <quic_spathi@...cinc.com>, will@...nel.org,
        mark.rutland@....com, peterz@...radead.org, mingo@...hat.com,
        acme@...nel.org, alexander.shishkin@...ux.intel.com,
        jolsa@...nel.org, namhyung@...nel.org, catalin.marinas@....com,
        linux-arm-kernel@...ts.infradead.org,
        linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V1] arm64: perf: Change PMCR write to read-modify-write

On 2022-04-27 10:51, Srinivasarao Pathipati wrote:
> Preserve the bitfields of PMCR_EL0 during PMU reset.
> Reset routine should set only PMCR.C, PMCR.P and PMCR.LC fields only
> to reset the counters. Other fields should not be changed
> as they could be set before PMU initialization and their value must
> be preserved even after reset.

No. We also want to ensure PMCR.E and PMCR.D are set to 0, for example. 
Given that nearly all the writeable fields in PMCR reset to an 
architecturally UNKNOWN value, preserving that is clearly nonsense. 
What's your *real* motivation here?

Thanks,
Robin.

> Signed-off-by: Srinivasarao Pathipati <quic_spathi@...cinc.com>
> ---
>   arch/arm64/kernel/perf_event.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c
> index cb69ff1..9e22326 100644
> --- a/arch/arm64/kernel/perf_event.c
> +++ b/arch/arm64/kernel/perf_event.c
> @@ -1047,7 +1047,7 @@ static void armv8pmu_reset(void *info)
>   	if (armv8pmu_has_long_event(cpu_pmu))
>   		pmcr |= ARMV8_PMU_PMCR_LP;
>   
> -	armv8pmu_pmcr_write(pmcr);
> +	armv8pmu_pmcr_write(armv8pmu_pmcr_read() | pmcr);
>   }
>   
>   static int __armv8_pmuv3_map_event(struct perf_event *event,