linux-kernel - Re: [PATCH V1] arm64: perf: Change PMCR write to read-modify-write

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <SA0PR02MB735545C7F1138C04A87A42D6D9FA9@SA0PR02MB7355.namprd02.prod.outlook.com>
Date:   Wed, 27 Apr 2022 11:09:28 +0000
From:   "Srinivasarao Pathipati (Consultant)" <c_spathi@....qualcomm.com>
To:     Robin Murphy <robin.murphy@....com>,
        quic_spathi <quic_spathi@...cinc.com>,
        "will@...nel.org" <will@...nel.org>,
        "mark.rutland@....com" <mark.rutland@....com>,
        "peterz@...radead.org" <peterz@...radead.org>,
        "mingo@...hat.com" <mingo@...hat.com>,
        "acme@...nel.org" <acme@...nel.org>,
        "alexander.shishkin@...ux.intel.com" 
        <alexander.shishkin@...ux.intel.com>,
        "jolsa@...nel.org" <jolsa@...nel.org>,
        "namhyung@...nel.org" <namhyung@...nel.org>,
        "catalin.marinas@....com" <catalin.marinas@....com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-perf-users@...r.kernel.org" <linux-perf-users@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V1] arm64: perf: Change PMCR write to read-modify-write

>
>On 2022-04-27 10:51, Srinivasarao Pathipati wrote:
>> Preserve the bitfields of PMCR_EL0 during PMU reset.
>> Reset routine should set only PMCR.C, PMCR.P and PMCR.LC fields only
>> to reset the counters. Other fields should not be changed
>> as they could be set before PMU initialization and their value must
>> be preserved even after reset.
>
>No. We also want to ensure PMCR.E and PMCR.D are set to 0, for example.
>Given that nearly all the writeable fields in PMCR reset to an
>architecturally UNKNOWN value, preserving that is clearly nonsense.
>What's your *real* motivation here?

Thanks Robin for reviewing this patch.
The X bit is set by firmware on Qualcomm chipsets 
same is getting cleared by kernel from armv8pmu_reset().
We are trying to retain this bit with this patch.

If it is wrong to retaining all bits? can we just retain X bit?