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Message-ID: <20220427144620.9105-5-pmalgujar@marvell.com>
Date: Wed, 27 Apr 2022 07:46:19 -0700
From: Piyush Malgujar <pmalgujar@...vell.com>
To: <linux-gpio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<devicetree@...r.kernel.org>
CC: <linus.walleij@...aro.org>, <brgl@...ev.pl>, <robh+dt@...nel.org>,
<krzysztof.kozlowski+dt@...aro.org>, <rric@...nel.org>,
<cchavva@...vell.com>, <wsadowski@...vell.com>,
Piyush Malgujar <pmalgujar@...vell.com>
Subject: [PATCH 4/5] gpio: thunderx: extend PIN_SEL_MASK to cover otx2 platform
Extending the PIN_SEL_MASK to support otx2 platform which was
earlier RAZ.
Signed-off-by: Piyush Malgujar <pmalgujar@...vell.com>
---
drivers/gpio/gpio-thunderx.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpio/gpio-thunderx.c b/drivers/gpio/gpio-thunderx.c
index 451c412512450fea717937376002d2ba35d1c508..87ab1ad7e652347a67b7747ea497b944498a8b41 100644
--- a/drivers/gpio/gpio-thunderx.c
+++ b/drivers/gpio/gpio-thunderx.c
@@ -32,7 +32,7 @@
#define GPIO_BIT_CFG_FIL_CNT_SHIFT 4
#define GPIO_BIT_CFG_FIL_SEL_SHIFT 8
#define GPIO_BIT_CFG_TX_OD BIT(12)
-#define GPIO_BIT_CFG_PIN_SEL_MASK GENMASK(25, 16)
+#define GPIO_BIT_CFG_PIN_SEL_MASK GENMASK(26, 16)
#define GPIO_INTR 0x800
#define GPIO_INTR_INTR BIT(0)
#define GPIO_INTR_INTR_W1S BIT(1)
--
2.17.1
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