linux-kernel - Re: [PATCH] arm64: kcsan: Fix kcsan test

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Date:   Thu, 28 Apr 2022 11:49:05 +0100
From:   Will Deacon <will@...nel.org>
To:     Mark Rutland <mark.rutland@....com>
Cc:     Marco Elver <elver@...gle.com>,
        Kefeng Wang <wangkefeng.wang@...wei.com>,
        catalin.marinas@....com, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] arm64: kcsan: Fix kcsan test_barrier fail and panic

On Tue, Apr 26, 2022 at 01:50:39PM +0100, Mark Rutland wrote:
> On Tue, Apr 26, 2022 at 02:10:06PM +0200, Marco Elver wrote:
> > On Tue, Apr 26, 2022 at 08:17AM +0000, Kefeng Wang wrote:
> > > diff --git a/include/asm-generic/barrier.h b/include/asm-generic/barrier.h
> > > index fd7e8fbaeef1..18863c50e9ce 100644
> > > --- a/include/asm-generic/barrier.h
> > > +++ b/include/asm-generic/barrier.h
> > > @@ -38,6 +38,10 @@
> > >  #define wmb()	do { kcsan_wmb(); __wmb(); } while (0)
> > >  #endif
> > >  
> > > +#ifdef __dma_mb
> > > +#define dma_mb()	do { kcsan_mb(); __dma_mb(); } while (0)
> > > +#endif
> > > +
> > 
> > So it looks like arm64 is the only arch that defines dma_mb(). By adding
> > it to asm-generic, we'd almost be encouraging other architectures to add
> > it, which I don't know we want.
> > 
> > Documentation/memory-barriers.txt doesn't mention dma_mb() either - so
> > perhaps dma_mb() doesn't belong in asm-generic/barrier.h, and you could
> > only change arm64's definition of dma_mb() to add the kcsan_mb().
> > 
> > Preferences? Maybe arch64 maintainers have more background on why arm64
> > is an anomaly here.
> 
> Looking around, there's a single user:
> 
> [mark@...rids:~/src/linux]% git grep -w dma_mb 
> arch/arm64/include/asm/barrier.h:#define dma_mb()       dmb(osh)
> arch/arm64/include/asm/io.h:#define __iomb()            dma_mb()
> 
> [mark@...rids:~/src/linux]% git grep -w __iomb 
> arch/arm64/include/asm/io.h:#define __iomb()            dma_mb()
> drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c:    __iomb();
> 
> ... and that was introduced in commit:
> 
>   a76a37777f2c936b ("iommu/arm-smmu-v3: Ensure queue is read after updating prod pointer")
> 
> ... where it is used to ensure that prior (read and write) accesses to
> memory by a CPU are ordered w.r.t. a subsequent MMIO write.
> 
> That seems like it could be a generic shape of problem (especially for
> IOMMUs), even if arm64 is the only architecture with an implementation
> today. From my PoV it would weem to make sense as a generic thing, and
> should probably be added to Documentation/memory-barriers.txt.
> 
> Will, thoughts?

Given that the read and write variants are generic, making the full-fat
version version as well makes sense to me.

Will