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Message-ID: <4ff0ca7c-8f41-374a-9862-3cb30c7d8d66@linux.intel.com>
Date: Fri, 29 Apr 2022 11:17:33 +0800
From: Xing Zhengjun <zhengjun.xing@...ux.intel.com>
To: Ian Rogers <irogers@...gle.com>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Athira Rajeev <atrajeev@...ux.vnet.ibm.com>,
Andi Kleen <ak@...ux.intel.com>,
Jin Yao <yao.jin@...ux.intel.com>,
linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] perf vendor events intel: Add cpuid for
sapphirerapids
On 4/29/2022 4:29 AM, Ian Rogers wrote:
> Fixes compile time warnings:
>
> pmu-events/pmu-events.c:27238:31: error: ‘pme_sapphirerapids’ defined but not used [-Werror=unused-const-variable=]
> 27238 | static const struct pmu_event pme_sapphirerapids[] = {
> | ^~~~~~~~~~~~~~~~~~
>
> Signed-off-by: Ian Rogers <irogers@...gle.com>
> ---
> tools/perf/pmu-events/arch/x86/mapfile.csv | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv
> index 963a76fec277..4b47ac1b806d 100644
> --- a/tools/perf/pmu-events/arch/x86/mapfile.csv
> +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv
> @@ -41,6 +41,7 @@ GenuineIntel-6-A7,v1,icelake,core
> GenuineIntel-6-6A,v1,icelakex,core
> GenuineIntel-6-6C,v1,icelakex,core
> GenuineIntel-6-86,v1,tremontx,core
> +GenuineIntel-6-8F,v1,sapphirerapids,core
In
https://lore.kernel.org/all/20220413210503.3256922-3-irogers@google.com/, it
has already added the cpuid for sapphirerapids
> GenuineIntel-6-96,v1,elkhartlake,core
> GenuineIntel-6-97,v1,alderlake,core
> GenuineIntel-6-9A,v1,alderlake,core
--
Zhengjun Xing
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