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Message-ID: <9b3891d6-4553-5757-e4b0-9900723267f7@linaro.org>
Date: Sat, 30 Apr 2022 21:33:42 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Konrad Dybcio <konrad.dybcio@...ainline.org>,
~postmarketos/upstreaming@...ts.sr.ht
Cc: martin.botka@...ainline.org,
angelogioacchino.delregno@...ainline.org,
marijn.suijten@...ainline.org, jamipkettunen@...ainline.org,
Rob Clark <robdclark@...il.com>, Sean Paul <sean@...rly.run>,
Abhinav Kumar <quic_abhinavk@...cinc.com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Stephen Boyd <swboyd@...omium.org>,
Robert Foss <robert.foss@...aro.org>,
Kalyan Thota <quic_kalyant@...cinc.com>,
Loic Poulain <loic.poulain@...aro.org>,
linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] drm/msm/disp: dpu1: Properly sort qcm2290_dpu_caps
On 30/04/2022 19:15, Konrad Dybcio wrote:
> Due to MSM8998 support having been stuck in review for so long,
> another struct was added nearby, which confused git and resulted
> in the definitions not being sorted alphabetically. Fix it.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
> .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 22 +++++++++----------
> 1 file changed, 11 insertions(+), 11 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 0a217b5172bd..6e904d28824c 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -254,6 +254,17 @@ static const struct dpu_caps msm8998_dpu_caps = {
> .max_vdeci_exp = MAX_VERT_DECIMATION,
> };
>
> +static const struct dpu_caps qcm2290_dpu_caps = {
> + .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
> + .max_mixer_blendstages = 0x4,
> + .smart_dma_rev = DPU_SSPP_SMART_DMA_V2,
> + .ubwc_version = DPU_HW_UBWC_VER_20,
> + .has_dim_layer = true,
> + .has_idle_pc = true,
> + .max_linewidth = 2160,
> + .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> +};
> +
> static const struct dpu_caps sdm845_dpu_caps = {
> .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
> .max_mixer_blendstages = 0xb,
> @@ -417,17 +428,6 @@ static const struct dpu_mdp_cfg msm8998_mdp[] = {
> },
> };
>
> -static const struct dpu_caps qcm2290_dpu_caps = {
> - .max_mixer_width = DEFAULT_DPU_OUTPUT_LINE_WIDTH,
> - .max_mixer_blendstages = 0x4,
> - .smart_dma_rev = DPU_SSPP_SMART_DMA_V2,
> - .ubwc_version = DPU_HW_UBWC_VER_20,
> - .has_dim_layer = true,
> - .has_idle_pc = true,
> - .max_linewidth = 2160,
> - .pixel_ram_size = DEFAULT_PIXEL_RAM_SIZE,
> -};
> -
> static const struct dpu_mdp_cfg sdm845_mdp[] = {
> {
> .name = "top_0", .id = MDP_TOP,
--
With best wishes
Dmitry
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