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Message-Id: <20220502224127.2604333-12-michael@walle.cc>
Date:   Tue,  3 May 2022 00:41:25 +0200
From:   Michael Walle <michael@...le.cc>
To:     Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>
Cc:     Arnd Bergmann <arnd@...db.de>, Olof Johansson <olof@...om.net>,
        soc@...nel.org, linux-arm-kernel@...ts.infradead.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...onical.com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
        Claudiu Beznea <claudiu.beznea@...rochip.com>,
        Tudor.Ambarus@...rochip.com,
        Horatiu Vultur <horatiu.vultur@...rochip.com>,
        Michael Walle <michael@...le.cc>
Subject: [PATCH v4 11/13] ARM: dts: lan966x: add serdes node

Add the SerDes node. On the LAN966x SoC these SerDes are used to connect
network PHYs.

By default, that node is disabled.

Signed-off-by: Michael Walle <michael@...le.cc>
---
 arch/arm/boot/dts/lan966x.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi
index 7020b31322d8..d8185f5c7bfc 100644
--- a/arch/arm/boot/dts/lan966x.dtsi
+++ b/arch/arm/boot/dts/lan966x.dtsi
@@ -500,6 +500,14 @@ hwmon: hwmon@...10180 {
 			clocks = <&sys_clk>;
 		};
 
+		serdes: serdes@...2c000 {
+			compatible = "microchip,lan966x-serdes";
+			reg = <0xe202c000 0x9c>,
+			      <0xe2004010 0x4>;
+			#phy-cells = <2>;
+			status = "disabled";
+		};
+
 		gic: interrupt-controller@...11000 {
 			compatible = "arm,gic-400", "arm,cortex-a7-gic";
 			#interrupt-cells = <3>;
-- 
2.30.2

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