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Message-ID: <11970543.O9o76ZdvQC@phil>
Date: Wed, 04 May 2022 01:16:26 +0200
From: Heiko Stuebner <heiko@...ech.de>
To: Palmer Dabbelt <palmer@...belt.com>,
linux-riscv@...ts.infradead.org
Cc: Samuel Holland <samuel@...lland.org>,
Albert Ou <aou@...s.berkeley.edu>,
Greentime Hu <greentime.hu@...ive.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
linux-kernel@...r.kernel.org, Samuel Holland <samuel@...lland.org>
Subject: Re: [PATCH] riscv: Fix irq_work when SMP is disabled
Am Samstag, 30. April 2022, 05:00:23 CEST schrieb Samuel Holland:
> irq_work is triggered via an IPI, but the IPI infrastructure is not
> included in uniprocessor kernels. As a result, irq_work never runs.
> Fall back to the tick-based irq_work implementation on uniprocessor
> configurations.
>
> Fixes: 298447928bb1 ("riscv: Support irq_work via self IPIs")
> Signed-off-by: Samuel Holland <samuel@...lland.org>
That uniprocessor part seems a tiny bit neglected - as I saw previously
with alternatives not getting applied as well, so
Reviewed-by: Heiko Stuebner <heiko@...ech.de>
Though somehow I find the arm32 style a tad nicer by defining
an is_smp() function [0] that holds the necessary checks.
But I guess that is a style preference.
Heiko
[0] https://elixir.bootlin.com/linux/latest/source/arch/arm/include/asm/smp_plat.h#L18
> ---
> This was found while bringing up cpufreq on D1. Switching cpufreq
> governors was hanging on irq_work_sync().
>
> arch/riscv/include/asm/irq_work.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/riscv/include/asm/irq_work.h b/arch/riscv/include/asm/irq_work.h
> index d6c277992f76..b53891964ae0 100644
> --- a/arch/riscv/include/asm/irq_work.h
> +++ b/arch/riscv/include/asm/irq_work.h
> @@ -4,7 +4,7 @@
>
> static inline bool arch_irq_work_has_interrupt(void)
> {
> - return true;
> + return IS_ENABLED(CONFIG_SMP);
> }
> extern void arch_irq_work_raise(void);
> #endif /* _ASM_RISCV_IRQ_WORK_H */
>
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