linux-kernel - Re: [PATCH v14 1/3] dt-binding: mediatek: add bindings for MediaTek MDP3 components

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Message-ID: <YnFqnEI16B+xrxdQ@robh.at.kernel.org>
Date:   Tue, 3 May 2022 12:47:08 -0500
From:   Rob Herring <robh@...nel.org>
To:     Moudy Ho <moudy.ho@...iatek.com>
Cc:     Mauro Carvalho Chehab <mchehab@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Hans Verkuil <hverkuil-cisco@...all.nl>,
        Chun-Kuang Hu <chunkuang.hu@...nel.org>,
        Rob Landley <rob@...dley.net>,
        Laurent Pinchart <laurent.pinchart@...asonboard.com>,
        linux-media@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org,
        Alexandre Courbot <acourbot@...omium.org>, tfiga@...omium.org,
        drinkcat@...omium.org, pihsun@...omium.org, hsinyi@...gle.com,
        Benjamin Gaignard <benjamin.gaignard@...labora.com>,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        daoyuan huang <daoyuan.huang@...iatek.com>,
        Ping-Hsun Wu <ping-hsun.wu@...iatek.com>,
        allen-kh.cheng@...iatek.com, xiandong.wang@...iatek.com,
        randy.wu@...iatek.com, jason-jh.lin@...iatek.com,
        roy-cw.yeh@...iatek.com, river.cheng@...iatek.com,
        Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v14 1/3] dt-binding: mediatek: add bindings for MediaTek
 MDP3 components

On Wed, Apr 27, 2022 at 03:05:12PM +0800, Moudy Ho wrote:
> This patch adds DT binding documents for Media Data Path 3 (MDP3)
> a unit in multimedia system combined with several components and
> used for scaling and color format convert.
> 
> Signed-off-by: Moudy Ho <moudy.ho@...iatek.com>
> ---
>  .../bindings/media/mediatek,mdp3-rdma.yaml    | 82 +++++++++++++++++++
>  .../bindings/media/mediatek,mdp3-rsz.yaml     | 61 ++++++++++++++
>  .../bindings/media/mediatek,mdp3-wrot.yaml    | 66 +++++++++++++++
>  .../bindings/soc/mediatek/mediatek,ccorr.yaml | 54 ++++++++++++
>  .../bindings/soc/mediatek/mediatek,wdma.yaml  | 67 +++++++++++++++
>  5 files changed, 330 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
>  create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-rsz.yaml
>  create mode 100644 Documentation/devicetree/bindings/media/mediatek,mdp3-wrot.yaml
>  create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,ccorr.yaml
>  create mode 100644 Documentation/devicetree/bindings/soc/mediatek/mediatek,wdma.yaml
> 
> diff --git a/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
> new file mode 100644
> index 000000000000..ce24eda14cb6
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/mediatek,mdp3-rdma.yaml
> @@ -0,0 +1,82 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/media/mediatek,mdp3-rdma.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Mediatek Read Direct Memory Access
> +
> +maintainers:
> +  - Matthias Brugger <matthias.bgg@...il.com>
> +  - Ping-Hsun Wu <ping-hsun.wu@...iatek.com>
> +
> +description: |
> +  Mediatek Read Direct Memory Access(RDMA) component used to do read DMA.
> +  It contains one line buffer to store the sufficient pixel data, and
> +  must be siblings to the central MMSYS_CONFIG node.
> +  For a description of the MMSYS_CONFIG binding, see
> +  Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
> +  for details.
> +
> +properties:
> +  compatible:
> +    items:
> +      - const: mediatek,mt8183-mdp3-rdma
> +
> +  reg:
> +    maxItems: 1
> +
> +  mediatek,gce-client-reg:
> +    $ref: '/schemas/types.yaml#/definitions/phandle-array'
> +    maxItems: 1

Like your other patches this needs 'items' describing each cell.

> +    description: |
> +      The register of client driver can be configured by gce with
> +      4 arguments defined in this property, such as phandle of gce, subsys id,
> +      register offset and size. Each GCE subsys id is mapping to a client
> +      defined in the header include/dt-bindings/gce/<chip>-gce.h.

Other than other cases of this property, the rest looks fine.

Rob