linux-kernel - Re: [PATCH v3 03/23] dt-bindings: ata: ahci-platform: Clarify common AHCI props constraints

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Message-ID: <d73f45d3-171f-a704-e479-411a54699d3b@suse.de>
Date:   Thu, 12 May 2022 08:21:42 +0200
From:   Hannes Reinecke <hare@...e.de>
To:     Serge Semin <Sergey.Semin@...kalelectronics.ru>,
        Damien Le Moal <damien.lemoal@...nsource.wdc.com>,
        Hans de Goede <hdegoede@...hat.com>,
        Jens Axboe <axboe@...nel.dk>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc:     Serge Semin <fancer.lancer@...il.com>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
        linux-ide@...r.kernel.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH v3 03/23] dt-bindings: ata: ahci-platform: Clarify common
 AHCI props constraints

On 5/12/22 01:17, Serge Semin wrote:
> Indeed in accordance with what is imeplemtned in the AHCI paltform driver

Spelling; 'imeplemtned' and 'paltform'

> and the way the AHCI DT nodes are defined in the DT files we can add the
> next AHCI DT properties constraints: AHCI CSR ID is fixed to 'ahci', PHY
> name is fixed to 'sata-phy', AHCI controller can't have more than 32 ports
> by design.
> 
> Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> 
> Changelog v2:
> - This is a new patch created after rebasing v1 onto the 5.18-rc3 kernel.
> ---
>   .../devicetree/bindings/ata/ahci-common.yaml      | 15 ++++++++++-----
>   1 file changed, 10 insertions(+), 5 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/ata/ahci-common.yaml b/Documentation/devicetree/bindings/ata/ahci-common.yaml
> index 620042ca12e7..a7d1a8353de3 100644
> --- a/Documentation/devicetree/bindings/ata/ahci-common.yaml
> +++ b/Documentation/devicetree/bindings/ata/ahci-common.yaml
> @@ -31,6 +31,8 @@ properties:
>   
>     reg-names:
>       description: CSR space IDs
> +    contains:
> +      const: ahci
>   
>     interrupts:
>       description:
> @@ -71,14 +73,13 @@ properties:
>       maxItems: 1
>   
>     phy-names:
> -    maxItems: 1
> +    const: sata-phy
>   
>     ports-implemented:
>       $ref: '/schemas/types.yaml#/definitions/uint32'
>       description:
>         Mask that indicates which ports the HBA supports. Useful if PI is not
>         programmed by the BIOS, which is true for some embedded SoC's.
> -    maximum: 0x1f
>   
>   patternProperties:
>     "^sata-port@[0-9a-f]+$":
> @@ -89,8 +90,12 @@ patternProperties:
>   
>       properties:
>         reg:
> -        description: AHCI SATA port identifier
> -        maxItems: 1
> +        description:
> +          AHCI SATA port identifier. By design AHCI controller can't have
> +          more than 32 ports due to the CAP.NP fields and PI register size
> +          constraints.
> +        minimum: 0
> +        maximum: 31
>   
>         phys:
>           description: Individual AHCI SATA port PHY
> @@ -98,7 +103,7 @@ patternProperties:
>   
>         phy-names:
>           description: AHCI SATA port PHY ID
> -        maxItems: 1
> +        const: sata-phy
>   
>         target-supply:
>           description: Power regulator for SATA port target device

Other than that it looks okay.

Reviewed-by: Hannes Reinecke <hare@...e.de>

Cheers,

Hannes
-- 
Dr. Hannes Reinecke		           Kernel Storage Architect
hare@...e.de			                  +49 911 74053 688
SUSE Software Solutions Germany GmbH, Maxfeldstr. 5, 90409 Nürnberg
HRB 36809 (AG Nürnberg), GF: Felix Imendörffer