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Message-ID: <912a5d2b-bc2d-677a-dd64-d66046fc734d@gmail.com>
Date: Fri, 20 May 2022 09:22:16 -0700
From: Florian Fainelli <f.fainelli@...il.com>
To: Nick Forrington <nick.forrington@....com>,
linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org,
acme@...nel.org
Cc: John Garry <john.garry@...wei.com>, Will Deacon <will@...nel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Leo Yan <leo.yan@...aro.org>,
Peter Zijlstra <peterz@...radead.org>,
Ingo Molnar <mingo@...hat.com>,
Mark Rutland <mark.rutland@....com>,
Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>,
Namhyung Kim <namhyung@...nel.org>,
Kajol Jain <kjain@...ux.ibm.com>,
Andi Kleen <ak@...ux.intel.com>,
James Clark <james.clark@....com>,
Andrew Kilroy <andrew.kilroy@....com>,
linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 1/1] perf vendors events arm64: Update Cortex A57/A72
On 5/17/2022 6:58 AM, Nick Forrington wrote:
> Categorise and add missing PMU events for Cortex-A57/A72, based on:
> https://github.com/ARM-software/data/blob/master/pmu/cortex-a57.json
> https://github.com/ARM-software/data/blob/master/pmu/cortex-a72.json
>
> These contain the same events, and are based on the Arm Technical
> Reference Manuals for Cortex-A57 and Cortex-A72.
>
> Signed-off-by: Nick Forrington <nick.forrington@....com>
Acked-by: Florian Fainelli <f.fainelli@...il.com>
--
Florian
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