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Message-ID: <20220523134517.4056873-2-nava.manne@xilinx.com>
Date:   Mon, 23 May 2022 19:15:15 +0530
From:   Nava kishore Manne <nava.manne@...inx.com>
To:     <mdf@...nel.org>, <hao.wu@...el.com>, <yilun.xu@...el.com>,
        <trix@...hat.com>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <michal.simek@...inx.com>,
        <nava.manne@...inx.com>, <linux-fpga@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>, <git@...inx.com>
CC:     Rob Herring <robh@...nel.org>
Subject: [PATCH v2 1/3] dt-bindings: zynqmp: Add new PD_PL macro

Add new power domain for PL region.

Signed-off-by: Nava kishore Manne <nava.manne@...inx.com>
Acked-by: Rob Herring <robh@...nel.org>
---
Changes for v2:
              - None.

 include/dt-bindings/power/xlnx-zynqmp-power.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/include/dt-bindings/power/xlnx-zynqmp-power.h b/include/dt-bindings/power/xlnx-zynqmp-power.h
index 0d9a412fd5e0..5f718759c38f 100644
--- a/include/dt-bindings/power/xlnx-zynqmp-power.h
+++ b/include/dt-bindings/power/xlnx-zynqmp-power.h
@@ -35,5 +35,6 @@
 #define		PD_CAN_1	48
 #define		PD_GPU		58
 #define		PD_PCIE		59
+#define		PD_PL		69
 
 #endif
-- 
2.25.1

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