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Message-ID: <35c700f6-ce67-89d5-0f29-426acd33efa9@socionext.com>
Date:   Thu, 26 May 2022 18:01:49 +0900
From:   Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
To:     Rob Herring <robh@...nel.org>, Bjorn Helgaas <bhelgaas@...gle.com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Masami Hiramatsu <mhiramat@...nel.org>
Cc:     linux-pci@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dt-bindings: PCI: socionext,uniphier-pcie: Add missing
 child interrupt controller

Hi Rob,

On 2022/05/26 6:01, Rob Herring wrote:
> The Socionext interrupt controller internal to the the PCI block isn't
> documented which causes warnings when unevaluatedProperties check is
> also fixed. Add the 'interrupt-controller' child node and properties and
> fixup the example so that interrupt properties can be parsed.

Surely internal interrupt controller isn't described, and should be documented.
And the child node name "legacy-interrupt-controller" also should be fixed.

Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>

BTW I can't reproduce such warnings with my environment.
Can you show the command line to reproduce the warnings?

Thank you,

> 
> Signed-off-by: Rob Herring <robh@...nel.org>
> ---
>   .../bindings/pci/socionext,uniphier-pcie.yaml | 23 ++++++++++++++++++-
>   1 file changed, 22 insertions(+), 1 deletion(-)
> 
> diff --git
> a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml
> b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml
> index f5926d0fb085..638b99db0433 100644
> --- a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml
> +++ b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml
> @@ -51,6 +51,19 @@ properties:
>     phy-names:
>       const: pcie-phy
>   
> +  interrupt-controller:
> +    type: object
> +    additionalProperties: false
> +
> +    properties:
> +      interrupt-controller: true
> +
> +      '#interrupt-cells':
> +        const: 1
> +
> +      interrupts:
> +        maxItems: 1
> +
>   required:
>     - compatible
>     - reg
> @@ -62,6 +75,13 @@ unevaluatedProperties: false
>   
>   examples:
>     - |
> +    bus {
> +        gic: interrupt-controller {
> +            interrupt-controller;
> +            #interrupt-cells = <3>;
> +        };
> +    };
> +
>       pcie: pcie@...00000 {
>           compatible = "socionext,uniphier-pcie";
>           reg-names = "dbi", "link", "config";
> @@ -80,6 +100,7 @@ examples:
>           phys = <&pcie_phy>;
>           #interrupt-cells = <1>;
>           interrupt-names = "dma", "msi";
> +        interrupt-parent = <&gic>;
>           interrupts = <0 224 4>, <0 225 4>;
>           interrupt-map-mask = <0 0 0  7>;
>           interrupt-map = <0 0 0  1  &pcie_intc 0>,
> @@ -87,7 +108,7 @@ examples:
>                           <0 0 0  3  &pcie_intc 2>,
>                           <0 0 0  4  &pcie_intc 3>;
>   
> -        pcie_intc: legacy-interrupt-controller {
> +        pcie_intc: interrupt-controller {
>               interrupt-controller;
>               #interrupt-cells = <1>;
>               interrupt-parent = <&gic>;
> 

---
Best Regards
Kunihiko Hayashi

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