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Message-ID: <3e7e8263-fdc1-ffa8-7b7f-188bb027fadf@quicinc.com>
Date:   Thu, 26 May 2022 16:46:51 +0530
From:   Sibi Sankar <quic_sibis@...cinc.com>
To:     Stephen Boyd <swboyd@...omium.org>,
        Bjorn Andersson <bjorn.andersson@...aro.org>
CC:     <robh+dt@...nel.org>, <krzysztof.kozlowski+dt@...aro.org>,
        <ohad@...ery.com>, <agross@...nel.org>,
        <mathieu.poirier@...aro.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-remoteproc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <mka@...omium.org>
Subject: Re: [PATCH v4 1/3] arm64: dts: qcom: sc7280: Add proxy interconnect
 requirements for modem


On 5/21/22 12:37 AM, Stephen Boyd wrote:
> Quoting Sibi Sankar (2022-05-20 11:08:52)
>> Hey Bjorn,
>> Thanks for taking time to review the series.
>>
>> On 5/20/22 2:05 AM, Bjorn Andersson wrote:
>>> On Thu 19 May 09:47 PDT 2022, Sibi Sankar wrote:
>>>
>>>> Add interconnects that are required to be proxy voted upon during modem
>>>> bootup on SC7280 SoCs.
>>>
>>> This looks reasonable, but how come the vote is only for DDR frequency?
>>> What about the buses between modem and ddr?
>>
>> The proxy votes that are put in aren't for perf related reasons, the
>> modem was getting llcc timeouts while trying to read contents from
>> memory. The hw team recommended the proxy votes as the fix.
> 
> Presumably the bootloader sets up some initial modem and ddr bus
> bandwidth requests? Or the modem bootloader stage (MSA?) handles that
> part?

Stephen/Bjorn,
Sorry for the delay, took a while to dig this up. The modem interconnect
is connected directly to gemnoc ddr. The path info from modem --> ddr is
split up into modem --> llcc and llcc --> ddr (Similar to CPUs) i.e. in
the end scaling of the path involves scaling of the two clocks, gemnoc
and ddr. There isn't any default vote for modem --> llcc as such but it
gets implicitly scaled when we vote max for llcc --> ddr path due to
dependency maintained between the two clocks by rpmh.

-Sibi

> 

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