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Message-ID: <CAHp75Ve3Y054nH9A-7W4iTz8DUc7-MCRQyhtXTXoOyJ3hfV43w@mail.gmail.com>
Date: Wed, 1 Jun 2022 17:46:16 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Andy Shevchenko <andy@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>
Subject: Re: [PATCH v1 1/3] gpio: crystalcove: make irq_chip immutable
On Wed, Jun 1, 2022 at 5:04 PM Andy Shevchenko
<andriy.shevchenko@...ux.intel.com> wrote:
>
> Since recently, the kernel is nagging about mutable irq_chips:
>
> "not an immutable chip, please consider fixing it!"
>
> Drop the unneeded copy, flag it as IRQCHIP_IMMUTABLE, add the new
> helper functions and call the appropriate gpiolib functions.
>
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> ---
> drivers/gpio/gpio-crystalcove.c | 26 +++++++++++++++++---------
> 1 file changed, 17 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpio/gpio-crystalcove.c b/drivers/gpio/gpio-crystalcove.c
> index b55c74a5e064..f40d3b133527 100644
> --- a/drivers/gpio/gpio-crystalcove.c
> +++ b/drivers/gpio/gpio-crystalcove.c
> @@ -15,6 +15,7 @@
> #include <linux/platform_device.h>
> #include <linux/regmap.h>
> #include <linux/seq_file.h>
> +#include <linux/types.h>
>
> #define CRYSTALCOVE_GPIO_NUM 16
> #define CRYSTALCOVE_VGPIO_NUM 95
> @@ -238,10 +239,13 @@ static void crystalcove_bus_sync_unlock(struct irq_data *data)
>
> static void crystalcove_irq_unmask(struct irq_data *data)
> {
> - struct crystalcove_gpio *cg =
> - gpiochip_get_data(irq_data_get_irq_chip_data(data));
> + struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
> + struct crystalcove_gpio *cg = gpiochip_get_data(gc);
> + irq_hw_number_t hwirq = irqd_to_hwirq(data);
> +
> + gpiochip_enable_irq(gc, hwirq);
>
> - if (data->hwirq < CRYSTALCOVE_GPIO_NUM) {
> + if (hwirq < CRYSTALCOVE_GPIO_NUM) {
> cg->set_irq_mask = false;
> cg->update |= UPDATE_IRQ_MASK;
> }
> @@ -249,23 +253,27 @@ static void crystalcove_irq_unmask(struct irq_data *data)
>
> static void crystalcove_irq_mask(struct irq_data *data)
> {
> - struct crystalcove_gpio *cg =
> - gpiochip_get_data(irq_data_get_irq_chip_data(data));
> + struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
> + struct crystalcove_gpio *cg = gpiochip_get_data(gc);
> + irq_hw_number_t hwirq = irqd_to_hwirq(data);
>
> - if (data->hwirq < CRYSTALCOVE_GPIO_NUM) {
> + if (hwirq < CRYSTALCOVE_GPIO_NUM) {
> cg->set_irq_mask = true;
> cg->update |= UPDATE_IRQ_MASK;
> }
> +
> + gpiochip_disable_irq(gc, hwirq);
> }
>
> -static struct irq_chip crystalcove_irqchip = {
> +static const struct irq_chip crystalcove_irqchip = {
> .name = "Crystal Cove",
> .irq_mask = crystalcove_irq_mask,
> .irq_unmask = crystalcove_irq_unmask,
> .irq_set_type = crystalcove_irq_type,
> .irq_bus_lock = crystalcove_bus_lock,
> .irq_bus_sync_unlock = crystalcove_bus_sync_unlock,
> - .flags = IRQCHIP_SKIP_SET_WAKE,
> + .flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_IMMUTABLE,
> + GPIOCHIP_IRQ_RESOURCE_HELPERS,
> };
>
> static irqreturn_t crystalcove_gpio_irq_handler(int irq, void *data)
> @@ -353,7 +361,7 @@ static int crystalcove_gpio_probe(struct platform_device *pdev)
> cg->regmap = pmic->regmap;
>
> girq = &cg->chip.irq;
> - girq->chip = &crystalcove_irqchip;
> + gpio_irq_chip_set_chip(girq, &crystalcove_irqchip);
> /* This will let us handle the parent IRQ in the driver */
> girq->parent_handler = NULL;
> girq->num_parents = 0;
> --
> 2.35.1
>
--
With Best Regards,
Andy Shevchenko
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