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Message-ID: <CAHp75VdezsaTyhJxhun+HG8M=q9cOQJKvNSOdcv90fXcn2mu-Q@mail.gmail.com>
Date: Wed, 1 Jun 2022 17:48:08 +0200
From: Andy Shevchenko <andy.shevchenko@...il.com>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: "open list:GPIO SUBSYSTEM" <linux-gpio@...r.kernel.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Andy Shevchenko <andy@...nel.org>,
Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <brgl@...ev.pl>
Subject: Re: [PATCH v1 1/3] gpio: crystalcove: make irq_chip immutable
On Wed, Jun 1, 2022 at 5:04 PM Andy Shevchenko
<andriy.shevchenko@...ux.intel.com> wrote:
...
> + gpiochip_enable_irq(gc, hwirq);
I think we do not need to do this for pins that we do not touch as
IRQs (they are vGPIOs with GPE capabilities, AFAIR).
> - if (data->hwirq < CRYSTALCOVE_GPIO_NUM) {
> + if (hwirq < CRYSTALCOVE_GPIO_NUM) {
> cg->set_irq_mask = false;
> cg->update |= UPDATE_IRQ_MASK;
> }
...
> - if (data->hwirq < CRYSTALCOVE_GPIO_NUM) {
> + if (hwirq < CRYSTALCOVE_GPIO_NUM) {
> cg->set_irq_mask = true;
> cg->update |= UPDATE_IRQ_MASK;
> }
> +
> + gpiochip_disable_irq(gc, hwirq);
Ditto.
--
With Best Regards,
Andy Shevchenko
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