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Message-ID: <9135b529-0ec1-fe37-5352-a231c8604d80@amd.com>
Date: Fri, 3 Jun 2022 10:54:34 +0530
From: Ravi Bangoria <ravi.bangoria@....com>
To: Namhyung Kim <namhyung@...nel.org>
Cc: Arnaldo Carvalho de Melo <acme@...nel.org>,
Kan Liang <kan.liang@...ux.intel.com>,
Jiri Olsa <jolsa@...nel.org>, Ian Rogers <irogers@...gle.com>,
Peter Zijlstra <peterz@...radead.org>, rrichter@....com,
Ingo Molnar <mingo@...hat.com>,
Mark Rutland <mark.rutland@....com>,
Thomas Gleixner <tglx@...utronix.de>,
Borislav Petkov <bp@...en8.de>,
James Clark <james.clark@....com>,
Leo Yan <leo.yan@...aro.org>, Andi Kleen <ak@...ux.intel.com>,
Stephane Eranian <eranian@...gle.com>, like.xu.linux@...il.com,
x86@...nel.org,
linux-perf-users <linux-perf-users@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
Sandipan Das <sandipan.das@....com>, ananth.narayan@....com,
Kim Phillips <kim.phillips@....com>, santosh.shukla@....com,
Ravi Bangoria <ravi.bangoria@....com>
Subject: Re: [PATCH v5 6/8] perf/x86/ibs: Add new IBS register bits into
header
On 03-Jun-22 3:18 AM, Namhyung Kim wrote:
> On Tue, May 31, 2022 at 8:30 PM Ravi Bangoria <ravi.bangoria@....com> wrote:
>>
>> IBS support has been enhanced with two new features in upcoming uarch:
>> 1. DataSrc extension and 2. L3 miss filtering. Additional set of bits
>> has been introduced in IBS registers to exploit these features. Define
>> these new bits into arch/x86/ header.
>>
>> Signed-off-by: Ravi Bangoria <ravi.bangoria@....com>
>> Acked-by: Ian Rogers <irogers@...gle.com>
>
> Isn't it a part of kernel changes?
Yes, that was left out because in the initial versions I did not have a
separate patch for kernel and tools. So Peter might not have consider it.
In any case, the changes into this header file are not used by kernel
atm. So I'm fine whichever way it goes in.
Thanks,
Ravi
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