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Message-ID: <ef822bb6f526c8bfa3a42cfc492bdd9dae22a097.camel@mediatek.com>
Date: Tue, 7 Jun 2022 17:15:18 +0800
From: CK Hu <ck.hu@...iatek.com>
To: Moudy Ho <moudy.ho@...iatek.com>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Hans Verkuil <hverkuil-cisco@...all.nl>
CC: Chun-Kuang Hu <chunkuang.hu@...nel.org>,
Rob Landley <rob@...dley.net>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
<linux-media@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-mediatek@...ts.infradead.org>,
Alexandre Courbot <acourbot@...omium.org>,
<tfiga@...omium.org>, <drinkcat@...omium.org>,
<pihsun@...omium.org>, <hsinyi@...gle.com>,
Benjamin Gaignard <benjamin.gaignard@...labora.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@...labora.com>,
daoyuan huang <daoyuan.huang@...iatek.com>,
Ping-Hsun Wu <ping-hsun.wu@...iatek.com>,
<allen-kh.cheng@...iatek.com>, <xiandong.wang@...iatek.com>,
<randy.wu@...iatek.com>, <jason-jh.lin@...iatek.com>,
<roy-cw.yeh@...iatek.com>, <river.cheng@...iatek.com>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
<cellopoint.kai@...il.com>
Subject: Re: [PATCH v19 2/6] soc: mediatek: mutex: add 8183 MUTEX MOD
settings for MDP
Hi, Moudy:
On Tue, 2022-05-31 at 13:52 +0800, Moudy Ho wrote:
> For the purpose of module independence, related settings should be
> moved
> from MDP to the corresponding driver.
> This patch adds 8183 MUTEX MOD settings for MDP.
Reviewed-by: CK Hu <ck.hu@...iatek.com>
>
> Signed-off-by: Moudy Ho <moudy.ho@...iatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <
> angelogioacchino.delregno@...labora.com>
> Reviewed-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> ---
> drivers/soc/mediatek/mtk-mutex.c | 21 +++++++++++++++++++++
> 1 file changed, 21 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mtk-mutex.c
> b/drivers/soc/mediatek/mtk-mutex.c
> index a3b054b33826..23009445adb4 100644
> --- a/drivers/soc/mediatek/mtk-mutex.c
> +++ b/drivers/soc/mediatek/mtk-mutex.c
> @@ -80,6 +80,15 @@
> #define MT8183_MUTEX_MOD_DISP_GAMMA0 16
> #define MT8183_MUTEX_MOD_DISP_DITHER0 17
>
> +#define MT8183_MUTEX_MOD_MDP_RDMA0 2
> +#define MT8183_MUTEX_MOD_MDP_RSZ0 4
> +#define MT8183_MUTEX_MOD_MDP_RSZ1 5
> +#define MT8183_MUTEX_MOD_MDP_TDSHP0 6
> +#define MT8183_MUTEX_MOD_MDP_WROT0 7
> +#define MT8183_MUTEX_MOD_MDP_WDMA 8
> +#define MT8183_MUTEX_MOD_MDP_AAL0 23
> +#define MT8183_MUTEX_MOD_MDP_CCORR0 24
> +
> #define MT8173_MUTEX_MOD_DISP_OVL0 11
> #define MT8173_MUTEX_MOD_DISP_OVL1 12
> #define MT8173_MUTEX_MOD_DISP_RDMA0 13
> @@ -273,6 +282,17 @@ static const unsigned int
> mt8183_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> [DDP_COMPONENT_WDMA0] = MT8183_MUTEX_MOD_DISP_WDMA0,
> };
>
> +static const unsigned int mt8183_mutex_table_mod[MUTEX_MOD_IDX_MAX]
> = {
> + [MUTEX_MOD_IDX_MDP_RDMA0] = MT8183_MUTEX_MOD_MDP_RDMA0,
> + [MUTEX_MOD_IDX_MDP_RSZ0] = MT8183_MUTEX_MOD_MDP_RSZ0,
> + [MUTEX_MOD_IDX_MDP_RSZ1] = MT8183_MUTEX_MOD_MDP_RSZ1,
> + [MUTEX_MOD_IDX_MDP_TDSHP0] = MT8183_MUTEX_MOD_MDP_TDSHP0,
> + [MUTEX_MOD_IDX_MDP_WROT0] = MT8183_MUTEX_MOD_MDP_WROT0,
> + [MUTEX_MOD_IDX_MDP_WDMA] = MT8183_MUTEX_MOD_MDP_WDMA,
> + [MUTEX_MOD_IDX_MDP_AAL0] = MT8183_MUTEX_MOD_MDP_AAL0,
> + [MUTEX_MOD_IDX_MDP_CCORR0] = MT8183_MUTEX_MOD_MDP_CCORR0,
> +};
> +
> static const unsigned int mt8186_mutex_mod[DDP_COMPONENT_ID_MAX] = {
> [DDP_COMPONENT_AAL0] = MT8186_MUTEX_MOD_DISP_AAL0,
> [DDP_COMPONENT_CCORR] = MT8186_MUTEX_MOD_DISP_CCORR0,
> @@ -400,6 +420,7 @@ static const struct mtk_mutex_data
> mt8183_mutex_driver_data = {
> .mutex_sof = mt8183_mutex_sof,
> .mutex_mod_reg = MT8183_MUTEX0_MOD0,
> .mutex_sof_reg = MT8183_MUTEX0_SOF0,
> + .mutex_table_mod = mt8183_mutex_table_mod,
> .no_clk = true,
> };
>
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