linux-kernel - linux-next: manual merge of the drm-intel tree with Linus' tree

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Message-ID: <20220608095935.2265208c@canb.auug.org.au>
Date:   Wed, 8 Jun 2022 09:59:35 +1000
From:   Stephen Rothwell <sfr@...b.auug.org.au>
To:     Daniel Vetter <daniel.vetter@...ll.ch>,
        Jani Nikula <jani.nikula@...ux.intel.com>,
        Joonas Lahtinen <joonas.lahtinen@...ux.intel.com>,
        Rodrigo Vivi <rodrigo.vivi@...el.com>
Cc:     Intel Graphics <intel-gfx@...ts.freedesktop.org>,
        DRI <dri-devel@...ts.freedesktop.org>,
        Anshuman Gupta <anshuman.gupta@...el.com>,
        Ashutosh Dixit <ashutosh.dixit@...el.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Linux Next Mailing List <linux-next@...r.kernel.org>,
        Tvrtko Ursulin <tvrtko.ursulin@...el.com>
Subject: linux-next: manual merge of the drm-intel tree with Linus' tree

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/gt/intel_rps.c

between commit:

  56758cc45955 ("drm/i915/rps: Centralize computation of freq caps")

from Linus' tree and commit:

  ee421bb4cb95 ("drm/i915/pcode: Extend pcode functions for multiple gt's")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

-- 
Cheers,
Stephen Rothwell

diff --cc drivers/gpu/drm/i915/gt/intel_rps.c
index 3476a11f294c,ce61ceb07114..000000000000
--- a/drivers/gpu/drm/i915/gt/intel_rps.c
+++ b/drivers/gpu/drm/i915/gt/intel_rps.c
@@@ -1138,15 -1095,13 +1138,16 @@@ static void gen6_rps_init(struct intel_
  	if (IS_HASWELL(i915) || IS_BROADWELL(i915) ||
  	    IS_GEN9_BC(i915) || GRAPHICS_VER(i915) >= 11) {
  		u32 ddcc_status = 0;
 +		u32 mult = 1;
  
 +		if (IS_GEN9_BC(i915) || GRAPHICS_VER(i915) >= 11)
 +			mult = GEN9_FREQ_SCALER;
- 		if (snb_pcode_read(i915, HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL,
+ 		if (snb_pcode_read(rps_to_gt(rps)->uncore,
+ 				   HSW_PCODE_DYNAMIC_DUTY_CYCLE_CONTROL,
  				   &ddcc_status, NULL) == 0)
  			rps->efficient_freq =
 -				clamp_t(u8,
 -					(ddcc_status >> 8) & 0xff,
 +				clamp_t(u32,
 +					((ddcc_status >> 8) & 0xff) * mult,
  					rps->min_freq,
  					rps->max_freq);
  	}

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