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Message-ID: <CAP6Zq1iDbB+X5QPE4Nsqk4nV41bZiVzQZExS1pQTuKEBz-iYew@mail.gmail.com>
Date: Fri, 10 Jun 2022 01:05:40 +0300
From: Tomer Maimon <tmaimon77@...il.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc: Avi Fishman <avifishman70@...il.com>,
Tali Perry <tali.perry1@...il.com>,
Joel Stanley <joel@....id.au>,
Patrick Venture <venture@...gle.com>,
Nancy Yuen <yuenn@...gle.com>,
Benjamin Fair <benjaminfair@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
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Subject: Re: [PATCH v2 12/20] dt-bindings: reset: npcm: Add support for NPCM8XX
Hi Krzysztof,
Sorry, but I thought the fix is only to add an explanation to the
dt-binding file as was done in V2.
The NPCM8XX binding is done in the same way as the NPCM7XX and both
use the same reset driver and use the same reset method in upstreamed
NPCM reset driver.
Can you please explain again what you suggest to do?
On Wed, 8 Jun 2022 at 13:11, Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
>
> On 08/06/2022 11:56, Tomer Maimon wrote:
> > Add binding document and device tree binding
> > constants for Nuvoton BMC NPCM8XX reset controller.
> >
> > Signed-off-by: Tomer Maimon <tmaimon77@...il.com>
> > ---
> > .../bindings/reset/nuvoton,npcm-reset.yaml | 13 +-
> > .../dt-bindings/reset/nuvoton,npcm8xx-reset.h | 128 ++++++++++++++++++
> > 2 files changed, 140 insertions(+), 1 deletion(-)
> > create mode 100644 include/dt-bindings/reset/nuvoton,npcm8xx-reset.h
> >
> > diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml
> > index c6bbc1589ab9..93ea81686f58 100644
> > --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml
> > +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.yaml
> > @@ -9,9 +9,20 @@ title: Nuvoton NPCM Reset controller
> > maintainers:
> > - Tomer Maimon <tmaimon77@...il.com>
> >
> > +description: |
> > + The NPCM reset controller used to reset various set of peripherals.
> > + Please refer to reset.txt in this directory for common reset
> > + controller binding usage.
> > +
> > + For list of all valid reset indices see
> > + <dt-bindings/reset/nuvoton,npcm7xx-reset.h> for Poleg NPCM7XX SoC,
> > + <dt-bindings/reset/nuvoton,npcm8xx-reset.h> for Arbel NPCM8XX SoC.
> > +
> > properties:
> > compatible:
> > - const: nuvoton,npcm750-reset
> > + enum:
> > + - nuvoton,npcm750-reset # Poleg NPCM7XX SoC
> > + - nuvoton,npcm845-reset # Arbel NPCM8XX SoC
> >
> > reg:
> > maxItems: 1
> > diff --git a/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h
> > new file mode 100644
> > index 000000000000..5b3b74534b50
> > --- /dev/null
> > +++ b/include/dt-bindings/reset/nuvoton,npcm8xx-reset.h
> > @@ -0,0 +1,128 @@
> > +/* SPDX-License-Identifier: GPL-2.0 */
>
> Again - ignored comment from v1.
>
> > +/*
> > + * Copyright (c) 2022 Nuvoton Technology corporation.
> > + * Author: Tomer Maimon <tmaimon77@...il.com>
> > + */
> > +
> > +#ifndef _DT_BINDINGS_NPCM8XX_RESET_H
> > +#define _DT_BINDINGS_NPCM8XX_RESET_H
> > +
> > +/* represent reset register offset */
> > +#define NPCM8XX_RESET_IPSRST1 0x20
> > +#define NPCM8XX_RESET_IPSRST2 0x24
> > +#define NPCM8XX_RESET_IPSRST3 0x34
> > +#define NPCM8XX_RESET_IPSRST4 0x74
> > +
> > +/* Reset lines on IP1 reset module (NPCM8XX_RESET_IPSRST1) */
>
> Again - ignored comment from v1. My last message was quite clear, wasn't it?
>
> https://lore.kernel.org/all/4a69902f-a545-23a1-1430-e5ece16997e9@linaro.org/
>
> You ignored several of previous comments, so:
>
> NAK.
>
> Best regards,
> Krzysztof
Appreciate your time and comments.
Best regards,
Tomer
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