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Message-ID: <PH0PR21MB30254824A4CC8CF6FD5EAD96D7A79@PH0PR21MB3025.namprd21.prod.outlook.com>
Date: Thu, 9 Jun 2022 01:30:24 +0000
From: "Michael Kelley (LINUX)" <mikelley@...rosoft.com>
To: Chaitanya Kulkarni <chaitanyak@...dia.com>
CC: Caroline Subramoney <Caroline.Subramoney@...rosoft.com>,
"linux-nvme@...ts.infradead.org" <linux-nvme@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"axboe@...com" <axboe@...com>,
Richard Wurdack <riwurd@...rosoft.com>,
Nathan Obr <Nathan.Obr@...rosoft.com>,
"sagi@...mberg.me" <sagi@...mberg.me>,
"kbusch@...nel.org" <kbusch@...nel.org>, "hch@....de" <hch@....de>
Subject: RE: [PATCH v4 1/1] nvme: handle persistent internal error AER from
NVMe controller
From: Chaitanya Kulkarni <chaitanyak@...dia.com>
>
> On 6/8/22 17:22, Chaitanya Kulkarni wrote:
> > On 6/8/22 11:52, Michael Kelley wrote:
> >> In the NVM Express Revision 1.4 spec, Figure 145 describes possible
> >> values for an AER with event type "Error" (value 000b). For a
> >> Persistent Internal Error (value 03h), the host should perform a
> >> controller reset.
> >>
> >> Add support for this error using code that already exists for
> >> doing a controller reset. As part of this support, introduce
> >> two utility functions for parsing the AER type and subtype.
> >>
> >> This new support was tested in a lab environment where we can
> >> generate the persistent internal error on demand, and observe
> >> both the Linux side and NVMe controller side to see that the
> >> controller reset has been done.
> >>
> >>
>
> Can you please clarify that which transports you have tested
> such as RDMA, TCP, and PCIe ?
>
I've tested PCIe only -- that's all I have access to. I can tweak
the commit message to be more specific.
Michael
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