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Message-ID: <YqHH+oX/90KXv8dN@sirena.org.uk>
Date: Thu, 9 Jun 2022 11:14:18 +0100
From: Mark Brown <broonie@...nel.org>
To: "Zhang, Tianfei" <tianfei.zhang@...el.com>
Cc: "matthew.gerlach@...ux.intel.com" <matthew.gerlach@...ux.intel.com>,
"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
"rafael@...nel.org" <rafael@...nel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"Wu, Hao" <hao.wu@...el.com>, "trix@...hat.com" <trix@...hat.com>,
"Xu, Yilun" <yilun.xu@...el.com>,
"Weight, Russell H" <russell.h.weight@...el.com>
Subject: Re: [PATCH v1] regmap: add generic indirect regmap support
On Wed, Jun 08, 2022 at 11:54:26PM +0000, Zhang, Tianfei wrote:
> > > Would a different name help?
> >
> > This wouldn't address the major problem which is...
> >
> > > > > + writel(0, ctx->base + INDIRECT_CMD_OFF);
> > > > > + ret = readl_poll_timeout((ctx->base + INDIRECT_CMD_OFF), cmd,
> > > > > + (!cmd), INDIRECT_INT_US,
> > INDIRECT_TIMEOUT_US);
> > > > > + if (ret)
> > > > > + dev_err(ctx->dev, "%s timed out on clearing cmd 0x%xn",
> > > > > +__func__, cmd);
> >
> > > > ...and this doesn't look particularly generic, it looks like it's
> > > > for some particular controller/bridge?
> >
> > ...that this appears to be entirely specific to some particular device, it's got
> > things like hard coded register addresses and timeouts which mean it can't be
> > reused.
>
> Yet, this is a register access hardware controller/bridge widely used in FPGA IP blocks, like PMCI, HSSI.
> How about we change the patch title like this:
> regmap: add indirect register controller support
No, please enage with my feedback above.
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