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Message-Id: <20220616015151.B4729C3411A@smtp.kernel.org>
Date: Wed, 15 Jun 2022 18:51:49 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Rex-BC Chen <rex-bc.chen@...iatek.com>,
krzysztof.kozlowski+dt@...aro.org, matthias.bgg@...il.com,
mturquette@...libre.com, robh+dt@...nel.org
Cc: p.zabel@...gutronix.de, angelogioacchino.delregno@...labora.com,
nfraprado@...labora.com, chun-jie.chen@...iatek.com,
wenst@...omium.org, runyang.chen@...iatek.com,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org,
Project_Global_Chrome_Upstream_Group@...iatek.com,
Rex-BC Chen <rex-bc.chen@...iatek.com>
Subject: Re: [RESEND v8 07/19] clk: mediatek: reset: Support nonsequence base offsets of reset registers
Quoting Rex-BC Chen (2022-05-23 02:33:34)
> The bank offsets are not serial for all reset registers.
> For example, there are five infra reset banks for MT8192: 0x120, 0x130,
> 0x140, 0x150 and 0x730.
>
> To support this,
> - Change reg_ofs to rst_bank_ofs which is a pointer to base offsets of
> the reset register.
> - Add a new define RST_NR_PER_BANK to define reset number for each
> reset bank.
>
> Signed-off-by: Rex-BC Chen <rex-bc.chen@...iatek.com>
> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> Reviewed-by: NĂcolas F. R. A. Prado <nfraprado@...labora.com>
> Tested-by: NĂcolas F. R. A. Prado <nfraprado@...labora.com>
> ---
Applied to clk-next
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