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Date:   Wed, 15 Jun 2022 19:44:40 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>, mturquette@...libre.com
Cc:     matthias.bgg@...il.com, wenst@...omium.org,
        angelogioacchino.delregno@...labora.com, miles.chen@...iatek.com,
        chun-jie.chen@...iatek.com, linux-clk@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org,
        linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
        rex-bc.chen@...iatek.com
Subject: Re: [PATCH] clk: mediatek: clk-mt8195-vdo0: Set rate on vdo0_dp_intf0_dp_intf's parent

Quoting AngeloGioacchino Del Regno (2022-06-14 02:10:20)
> Add the CLK_SET_RATE_PARENT flag to the CLK_VDO0_DP_INTF0_DP_INTF
> clock: this is required to trigger clock source selection on
> CLK_TOP_EDP, while avoiding to manage the enablement of the former
> separately from the latter in the displayport driver.
> 
> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> ---

Any Fixes tag?

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