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Date:   Thu, 16 Jun 2022 15:57:17 +0800
From:   Rex-BC Chen <rex-bc.chen@...iatek.com>
To:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        <chunkuang.hu@...nel.org>, <p.zabel@...gutronix.de>,
        <daniel@...ll.ch>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <matthias.bgg@...il.com>,
        <airlied@...ux.ie>
CC:     <msp@...libre.com>, <granquet@...libre.com>,
        <jitao.shi@...iatek.com>, <wenst@...omium.org>,
        <ck.hu@...iatek.com>, <dri-devel@...ts.freedesktop.org>,
        <linux-mediatek@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>
Subject: Re: [PATCH v11 10/12] drm/mediatek: dpi: Add dpintf support

On Mon, 2022-06-13 at 12:55 +0200, AngeloGioacchino Del Regno wrote:
> Il 13/06/22 08:48, Bo-Chen Chen ha scritto:
> > From: Guillaume Ranquet <granquet@...libre.com>
> > 
> > dpintf is the displayport interface hardware unit. This unit is
> > similar
> > to dpi and can reuse most of the code.
> > 
> > This patch adds support for mt8195-dpintf to this dpi driver. Main
> > differences are:
> >   - Some features/functional components are not available for
> > dpintf
> >     which are now excluded from code execution once is_dpintf is
> > set
> >   - dpintf can and needs to choose between different clockdividers
> > based
> >     on the clockspeed. This is done by choosing a different clock
> > parent.
> >   - There are two additional clocks that need to be managed. These
> > are
> >     only set for dpintf and will be set to NULL if not supplied.
> > The
> >     clk_* calls handle these as normal clocks then.
> >   - Some register contents differ slightly between the two
> > components. To
> >     work around this I added register bits/masks with a DPINTF_
> > prefix
> >     and use them where different.
> > 
> > Based on a separate driver for dpintf created by
> > Jitao shi <jitao.shi@...iatek.com>.
> > 
> > Signed-off-by: Markus Schneider-Pargmann <msp@...libre.com>
> > Signed-off-by: Guillaume Ranquet <granquet@...libre.com>
> > [Bo-Chen: Modify reviewers' comments.]
> > Signed-off-by: Bo-Chen Chen <rex-bc.chen@...iatek.com>
> > ---
> >   drivers/gpu/drm/mediatek/mtk_dpi.c          | 115
> > ++++++++++++++++++--
> >   drivers/gpu/drm/mediatek/mtk_dpi_regs.h     |  13 +++
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c |   4 +
> >   drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h |   1 +
> >   drivers/gpu/drm/mediatek/mtk_drm_drv.c      |   3 +
> >   5 files changed, 126 insertions(+), 10 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > index 6b8cf648a5b5..08c8f21b4421 100644
> > --- a/drivers/gpu/drm/mediatek/mtk_dpi.c
> > +++ b/drivers/gpu/drm/mediatek/mtk_dpi.c
> > @@ -71,6 +71,7 @@ struct mtk_dpi {
> >   	void __iomem *regs;
> >   	struct device *dev;
> >   	struct clk *engine_clk;
> > +	struct clk *pll_gate_clk;
> 
> You don't need this clock in this driver, at all.
> 
> `pll_gate` would be CLK_VDO0_DP_INTF0_DP_INTF (parent = CLK_TOP_EDP);
> 
> Currently, you're assigning CLK_TOP_EDP to "pixel", but you can, at
> this point,
> simply assign CLK_VDO0_DP_INTF0_DP_INTF to "pixel" instead... as when
> you call
> clk_prepare_enable() on it, that'll also take care of enabling its
> CLK_TOP_EDP
> parent for you.
> 
> You're not doing anything special if not taking care of
> enabling/disabling it.
> 
> Regards,
> Angelo
> 

Hello Angelo,

Thanks for advice. I can use your patch[1] to do this and verify ok.
I will remove pll_gate_clk in next version.

[1]: 
https://patchwork.kernel.org/project/linux-mediatek/patch/20220614091020.21472-1-angelogioacchino.delregno@collabora.com/

BRs,
Bo-Chen

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