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Message-ID: <Yqsz1tqmy4Mt8oOE@matsya>
Date:   Thu, 16 Jun 2022 06:44:54 -0700
From:   Vinod Koul <vkoul@...nel.org>
To:     Geert Uytterhoeven <geert@...ux-m68k.org>
Cc:     Hector Martin <marcan@...can.st>, Sven Peter <sven@...npeter.dev>,
        Alyssa Rosenzweig <alyssa@...enzweig.io>,
        Martin Povišer <povik+lin@...ebit.org>,
        linux-arm-kernel@...ts.infradead.org, dmaengine@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH -next] dmaengine: apple-admac: Fix build on
 32-bit/non-LPAE platforms

Hello Geert,

On 14-06-22, 09:49, Geert Uytterhoeven wrote:
> If CONFIG_PHYS_ADDR_T_64BIT is not set:
> 
>     drivers/dma/apple-admac.c: In function ‘admac_cyclic_write_one_desc’:
>     drivers/dma/apple-admac.c:213:22: error: right shift count >= width of type [-Werror=shift-count-overflow]
>       213 |  writel_relaxed(addr >> 32,       ad->base + REG_DESC_WRITE(channo));
>           |                      ^~
> 
> Fix this by using the {low,upp}er_32_bits() helper macros to obtain the
> address parts.

This changelog is good, but patch title needs update. We should never
reflect the effect of change, but describe the change in patch...

Maybe "dmaengine: apple-admac: use {lower|upper}_32_bits() for
extracting address" would be a better patch title...

Thanks

> 
> Reported-by: noreply@...erman.id.au
> Fixes: b127315d9a78c011 ("dmaengine: apple-admac: Add Apple ADMAC driver")
> Signed-off-by: Geert Uytterhoeven <geert@...ux-m68k.org>
> ---
>  drivers/dma/apple-admac.c | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/dma/apple-admac.c b/drivers/dma/apple-admac.c
> index c502f8c3aca79be1..d1f74a3aa999d773 100644
> --- a/drivers/dma/apple-admac.c
> +++ b/drivers/dma/apple-admac.c
> @@ -209,10 +209,10 @@ static void admac_cyclic_write_one_desc(struct admac_data *ad, int channo,
>  	dev_dbg(ad->dev, "ch%d descriptor: addr=0x%pad len=0x%zx flags=0x%lx\n",
>  		channo, &addr, tx->period_len, FLAG_DESC_NOTIFY);
>  
> -	writel_relaxed(addr,             ad->base + REG_DESC_WRITE(channo));
> -	writel_relaxed(addr >> 32,       ad->base + REG_DESC_WRITE(channo));
> -	writel_relaxed(tx->period_len,   ad->base + REG_DESC_WRITE(channo));
> -	writel_relaxed(FLAG_DESC_NOTIFY, ad->base + REG_DESC_WRITE(channo));
> +	writel_relaxed(lower_32_bits(addr), ad->base + REG_DESC_WRITE(channo));
> +	writel_relaxed(upper_32_bits(addr), ad->base + REG_DESC_WRITE(channo));
> +	writel_relaxed(tx->period_len,      ad->base + REG_DESC_WRITE(channo));
> +	writel_relaxed(FLAG_DESC_NOTIFY,    ad->base + REG_DESC_WRITE(channo));
>  
>  	tx->submitted_pos += tx->period_len;
>  	tx->submitted_pos %= 2 * tx->buf_len;
> -- 
> 2.25.1

-- 
~Vinod

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